u-boot.git/board/bachmann, branch v2016.09

mx6: ddr: Allow changing REFSEL and REFR fields

2016-09-06T16:22:48+00:00

Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam 
Reviewed-by: Eric Nelson

ot1200: Remove empty reset_cpu()

2015-11-12T16:26:33+00:00

There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Cc: Christian Gmeiner 
Signed-off-by: Fabio Estevam 
Acked-by: Christian Gmeiner

ot1200: Fix the error handling in board_eth_init()

2015-09-13T09:05:31+00:00

We should not return 0 on failure, so return a negative error code
instead.

Also centralize the error path so that is easier to follow.

Cc: Christian Gmeiner 
Signed-off-by: Fabio Estevam

mx6: remove SYS_SOC from board Kconfig

2015-09-13T08:37:29+00:00

Remove duplicated SYS_SOC Kconfig entry from board Kconfig,
because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Heiko Schocher 
Cc: Christian Gmeiner 
Cc: Stefan Roese 
Cc: Troy Kisky 
Cc: Nikita Kiryanov 
Cc: "Eric Bénard" 
Cc: Fabio Estevam 
Cc: Tim Harvey 
Cc: Marek Vasut 
Cc: Markus Niebel 
Cc: Otavio Salvador 
Acked-by: Stefan Roese 
Acked-by: Marek Vasut 
Acked-by: Christian Gmeiner 
Acked-by: Markus Niebel 
Acked-by: Troy Kisky 
Acked-by: Igor Grinberg

ot1200: setup i2c bus 1 in setup_iomux_i2c()

2015-06-08T06:48:32+00:00

On this bus there is a EEPROM containing EDID and ddr3
calibration information.

Signed-off-by: Christian Gmeiner

ot1200: setup i2c bus in board_early_init_f(..)

2015-06-08T06:48:15+00:00

Make it possible to use the i2c bus in SPL.

Signed-off-by: Christian Gmeiner

ot1200: add basic SPL support

2015-01-22T10:03:19+00:00

Currently we only support the Micron MT41K128M16JT-125 ddr3 chip.

Signed-off-by: Christian Gmeiner

ot1200: enable spi clock directly in ccgr_init(..)

2015-01-22T10:03:19+00:00

Signed-off-by: Christian Gmeiner

ot1200: move ccgr and gpr init to c functions

2015-01-22T10:03:19+00:00

We need this way for SPL boot.

Signed-off-by: Christian Gmeiner

ot1200: make use of imx_ddr_size(..)

2015-01-22T10:03:18+00:00

To support different ddr3 memory sizes we should start using
imx_ddr_size(..) instead of the define PHYS_SDRAM_SIZE.

Signed-off-by: Christian Gmeiner