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<title>u-boot.git/board/broadcom, branch v2021.01</title>
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<id>http://cgit.235523.xyz/u-boot.git/atom/board/broadcom?h=v2021.01</id>
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<updated>2020-09-09T20:57:35Z</updated>
<entry>
<title>board: ns3: check bnxt chimp handshake status</title>
<updated>2020-09-09T20:57:35Z</updated>
<author>
<name>Rayagonda Kokatanur</name>
<email>rayagonda.kokatanur@broadcom.com</email>
</author>
<published>2020-08-25T17:46:37Z</published>
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<id>urn:sha1:af071935d2c354f2250542f35e3178dd2660bfe1</id>
<content type='text'>
Chimp is a core in Broadcom netxtream controller (bnxt).
Add support to check bnxt's chimp component status.

Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: kconfig: extend board kconfig with specific commands</title>
<updated>2020-09-09T20:57:35Z</updated>
<author>
<name>Vladimir Olovyannikov</name>
<email>vladimir.olovyannikov@broadcom.com</email>
</author>
<published>2020-08-20T15:11:07Z</published>
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<id>urn:sha1:ff6a87560e06ba03653fe682fbad3a48b4b664d4</id>
<content type='text'>
Extend Kconfig for the board with board-specific commands selection.

Signed-off-by: Vladimir Olovyannikov &lt;vladimir.olovyannikov@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: add development keys used in FIT</title>
<updated>2020-07-29T14:37:11Z</updated>
<author>
<name>Pramod Kumar</name>
<email>pramod.kumar@broadcom.com</email>
</author>
<published>2020-07-15T17:25:41Z</published>
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<id>urn:sha1:2a4326ab254fb34931714387c5fa00511ace58b3</id>
<content type='text'>
Add development keys used in FIT.

Signed-off-by: Pramod Kumar &lt;pramod.kumar@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: add FIT image its file</title>
<updated>2020-07-29T14:37:11Z</updated>
<author>
<name>Pramod Kumar</name>
<email>pramod.kumar@broadcom.com</email>
</author>
<published>2020-07-15T17:25:40Z</published>
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<id>urn:sha1:e14563db050dd492555651e51d1e02bd2ed3f3af</id>
<content type='text'>
Add FIT image its file.

Signed-off-by: Pramod Kumar &lt;pramod.kumar@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: limit U-boot relocation within 16MB memory</title>
<updated>2020-07-29T14:37:11Z</updated>
<author>
<name>Bharat Kumar Reddy Gooty</name>
<email>bharat.gooty@broadcom.com</email>
</author>
<published>2020-07-15T17:19:05Z</published>
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<id>urn:sha1:53a3e8d46926213fea17115dbae035901a13bc05</id>
<content type='text'>
By default relocation happens to a higher address of DDR,
i.e, DDR start + DDR size.

U-Boot shall be used to collect the ramdump.
Restrict U-Boot to use only the 16MB memory, so that this
memory can be reserved. Limit relocation to happen within
16MB memory, start 0xFF00_0000 and end 0x1_0000_0000

Signed-off-by: Bharat Kumar Reddy Gooty &lt;bharat.gooty@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: define ddr memory layout</title>
<updated>2020-07-29T14:37:11Z</updated>
<author>
<name>Rayagonda Kokatanur</name>
<email>rayagonda.kokatanur@broadcom.com</email>
</author>
<published>2020-07-15T17:19:04Z</published>
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<id>urn:sha1:c8b98482d8b320be73f9eb8b8794f09dcb5044bd</id>
<content type='text'>
Add both DRAM banks memory information and
the corresponding MMU page table mappings.

Signed-off-by: Bharat Kumar Reddy Gooty &lt;bharat.gooty@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: program GIC LPI tables</title>
<updated>2020-07-29T14:37:10Z</updated>
<author>
<name>Rayagonda Kokatanur</name>
<email>rayagonda.kokatanur@broadcom.com</email>
</author>
<published>2020-07-15T17:19:01Z</published>
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<id>urn:sha1:f01a4e8cc96a43172398f2f441045ad8a2c90807</id>
<content type='text'>
U-boot programs the GIC LPI configuration tables and enables
the LPI table.

Signed-off-by: Bharat Kumar Reddy Gooty &lt;bharat.gooty@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: default reset type to L3</title>
<updated>2020-07-29T14:13:41Z</updated>
<author>
<name>Rayagonda Kokatanur</name>
<email>rayagonda.kokatanur@broadcom.com</email>
</author>
<published>2020-07-15T17:19:00Z</published>
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<id>urn:sha1:b5a152e7ca0b2b71300c1ef7a4c80a1f729a7d05</id>
<content type='text'>
Default "reset" from U-Boot to L3 reset.
"reset" command with argument will trigger L1 reset.

Signed-off-by: Rajesh Ravi &lt;rajesh.ravi@broadcom.com&gt;
Signed-off-by: Bharat Kumar Reddy Gooty &lt;bharat.gooty@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: add api to save boot parameters passed from BL31</title>
<updated>2020-07-29T14:13:41Z</updated>
<author>
<name>Abhishek Shah</name>
<email>abhishek.shah@broadcom.com</email>
</author>
<published>2020-07-15T17:18:59Z</published>
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<id>urn:sha1:ef7192e4043d7724f0d063072092e00150fb1f5e</id>
<content type='text'>
Add API to save boot parameters passed from BL31

Use assembly implementation of save_boot_params instead of c function.
Because generally ATF does not set up SP_EL2 on exiting.
Thus, usage of a C function immediately after exiting with no stack
setup done by ATF explicitly, may cause SP_EL2 to be not sane,
which in turn causes a crash if this boot was not lucky to get
an SP_EL2 in valid range. Replace C implementation with assembly one
which does not use stack this early, and let u-boot to set up its stack
later.

Signed-off-by: Abhishek Shah &lt;abhishek.shah@broadcom.com&gt;
Signed-off-by: Rajesh Ravi &lt;rajesh.ravi@broadcom.com&gt;
Signed-off-by: Vladimir Olovyannikov &lt;vladimir.olovyannikov@broadcom.com&gt;
Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: ns3: add support for Broadcom Northstar 3</title>
<updated>2020-07-29T14:13:40Z</updated>
<author>
<name>Rayagonda Kokatanur</name>
<email>rayagonda.kokatanur@broadcom.com</email>
</author>
<published>2020-07-15T17:18:55Z</published>
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<id>urn:sha1:291635aecf84442876030972fd05b767e738f6fb</id>
<content type='text'>
Add support for Broadcom Northstar 3 SoC.
NS3 is a octo-core 64-bit ARMv8 Cortex-A72 processors
targeting a broad range of networking applications.

Signed-off-by: Rayagonda Kokatanur &lt;rayagonda.kokatanur@broadcom.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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