Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/u-boot.git/atom/board/compulab?h=v2022.07 2022-05-20T07:30:28Z 2022-05-20T07:30:28Z Rasmus Villemoes rasmus.villemoes@prevas.dk 2022-04-25T14:22:48Z urn:sha1:290ffe57886271a6ac6b7750f70410ee51727f42 I was trying to employ lpddr4_mr_read() to something similar to what the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c differs from the private one used by that board in how it extracts the byte value, and I was only getting zeroes. Adding a bit of debug printf'ing gives me tmp = 0x00ffff00 tmp = 0x00070700 tmp = 0x00000000 tmp = 0x00101000 and indeed I was expecting a (combined) value of 0xff070010 (0xff being Manufacturer ID for Micron). I can't find any documentation that says how the values are supposed to be read, but clearly the iot-gate definition is the right one, both for its use case as well as my imx8mp-based board. So lift the private definition of lpddr4_mr_read() from the imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration in the ddr.h header where e.g. get_trained_CDD() is already declared. This has only been compile-tested for the imx8mm-cl-iot-gate board (since I don't have the hardware), but since I've merely moved its definition of lpddr4_mr_read(), I'd be surprised if it changed anything for that board. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Tested-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Reviewed-by: Fabio Estevam <festevam@denx.de> 2022-04-21T21:00:26Z Ying-Chun Liu (PaulLiu) paul.liu@linaro.org 2022-04-20T15:37:07Z urn:sha1:84adf929687ece735d6709932583a9603ace75d4 In arch/arm/mach-imx/imx8m/soc.c there's an implementation of board_fix_fdt() introduced by commit 35bb60787b88. Remove the redundant one to avoid failed to build from source when enabling CONFIG_OF_BOARD_FIXUP. Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: uboot-imx <uboot-imx@nxp.com> Reviewed-by: Fabio Estevam <festevam@denx.de> 2022-04-15T08:43:18Z Sughosh Ganu sughosh.ganu@linaro.org 2022-04-15T05:59:34Z urn:sha1:741ef867288bb294039e34ab2287ffe981b05b86 Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> 2022-04-12T17:10:44Z Fabio Estevam festevam@denx.de 2022-04-12T16:05:38Z urn:sha1:ea10bea68dee0c3e18cfc508dce03c25d06fc91b The serial number is located at offset 0x14 of the EEPROM under i2c0 bus at address 0x54. To print the serial number in Linux: SERNUM=$(cat /proc/device-tree/serial-number) echo $SERNUM Signed-off-by: Fabio Estevam <festevam@denx.de> 2022-04-12T17:10:44Z Fabio Estevam festevam@denx.de 2022-04-12T16:05:37Z urn:sha1:79bc9dcfa2d7d9557f32f9c84712169e041ced70 Currently the eth0 MAC address is randomly assigned. Retrieve the MAC address from EEPROM. Signed-off-by: Fabio Estevam <festevam@denx.de> 2022-04-12T17:10:44Z Fabio Estevam festevam@denx.de 2022-04-12T16:05:36Z urn:sha1:6924bc7ca28f773c32aa3763834e1027f5a9edbf Currently, the DDR type is retrieved by iteracting inside an array of possible DDR types. This may take saveral attempts, which slows the overall U-Boot process and does not provide a good user experience: U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 1/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0x5000010 ] resetting ... U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 2/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0x1061010 ] resetting ... U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000) DDRINFO: Cfg attempt: [ 3/6 ] DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(T): mr5-8 [ 0xff000010 ] Normal Boot WDT: Not starting Trying to boot from MMC2 NOTICE: BL31: v2.5(release):v2.5 NOTICE: BL31: Built : 07:12:44, Jan 24 2022 Improve the boot time by retrieving the correct DDR information from the EEPROM: U-Boot SPL 2022.04-rc4-00045-g6d02bc40d58c (Mar 19 2022 - 08:22:29 -0300) DDRINFO(D): Kingston 4096G DDRINFO(M): mr5-8 [ 0xff000010 ] DDRINFO(E): mr5-8 [ 0xff000010 ] Normal Boot WDT: Started watchdog@30280000 with servicing (60s timeout) Trying to boot from MMC2 NOTICE: BL31: v2.5(release):v2.5 NOTICE: BL31: Built : 22:28:11, Mar 15 2022 Based on the original code from Compulab's U-Boot. Tested on a imx8mm-cl-iot-gate board populated with 4GB of RAM. Signed-off-by: Fabio Estevam <festevam@denx.de> 2022-04-12T17:10:44Z Fabio Estevam festevam@denx.de 2022-04-12T16:05:35Z urn:sha1:0bb304e363059c5218fed56ed0a2a0bd31e18675 imx8mm-cl-iot-gate supports multiple DDR sizes and models. The DDR type can be retrieved from the EEPROM, so add SPL code that can be used to get the DDR information. Based on the original code from Compulab's U-Boot. Signed-off-by: Fabio Estevam <festevam@denx.de> 2022-02-09T04:07:58Z Simon Glass sjg@chromium.org 2022-01-22T12:07:22Z urn:sha1:5c86a8f7a191f0034fd992314874b669414dc5a0 This is supposed to be a build-system flag. Move it there so we can define it before linux/kconfig.h is included. Signed-off-by: Simon Glass <sjg@chromium.org> 2022-02-05T12:38:39Z Ying-Chun Liu (PaulLiu) paul.liu@linaro.org 2021-11-05T09:13:25Z urn:sha1:556523b95530709a7049ec0ba26d1a2f9f262573 Extension boards can be added to Compulab's iot-gate-imx8mm. We implement extension board manager for detecting the extension boards. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: uboot-imx <uboot-imx@nxp.com> 2022-01-10T19:01:57Z Tom Rini trini@konsulko.com 2022-01-10T19:01:57Z urn:sha1:fe04d885fb540b614a2f989e16e808b300ccb52e Signed-off-by: Tom Rini <trini@konsulko.com>