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<title>u-boot.git/board/compulab, branch v2022.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/compulab?h=v2022.10</id>
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<updated>2022-08-21T01:18:15Z</updated>
<entry>
<title>arm: Remove cm_t335 board</title>
<updated>2022-08-21T01:18:15Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-08-02T11:33:32Z</published>
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<id>urn:sha1:d8d5ab40d5429240219058371aaa203755cd3100</id>
<content type='text'>
This board is behind on several mandatory DM migrations and is missing
OF_CONTROL support that makes other conversions impossible. Remove it.

Cc: Igor Grinberg &lt;grinberg@compulab.co.il&gt;
Cc: Nikita Kiryanov &lt;nikita@compulab.co.il&gt;
Cc: Uri Mashiach &lt;uri.mashiach@compulab.co.il&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>linker_lists: Rename sections to remove . prefix</title>
<updated>2022-06-23T16:58:18Z</updated>
<author>
<name>Andrew Scull</name>
<email>ascull@google.com</email>
</author>
<published>2022-05-30T10:00:04Z</published>
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<id>urn:sha1:99e2fbcb69f0759432c4cfa0b6e1afa006f22930</id>
<content type='text'>
Rename the sections used to implement linker lists so they begin with
'__u_boot_list' rather than '.u_boot_list'. The double underscore at the
start is still distinct from the single underscore used by the symbol
names.

Having a '.' in the section names conflicts with clang's ASAN
instrumentation which tries to add redzones between the linker list
elements, causing expected accesses to fail. However, clang doesn't try
to add redzones to user sections, which are names with all alphanumeric
and underscore characters.

Signed-off-by: Andrew Scull &lt;ascull@google.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>imx: imx8mm-cl-iot-gate: enable pinctrl_wdog in SPL</title>
<updated>2022-06-14T19:33:14Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2022-06-11T12:21:03Z</published>
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<id>urn:sha1:2d7f40cad589bb2b457f2e6a4f704f4a4967c61b</id>
<content type='text'>
Mark pinctrl_wdog as u-boot,dm-spl to clean up board code,

The set_wdog_reset() function is not necessary as this is handled by
the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property
being set.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>imx: imx8mm-cl-iot-gate: Enable DM_SERIAL</title>
<updated>2022-06-14T19:33:13Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2022-06-11T12:20:56Z</published>
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<id>urn:sha1:37750505b90ab762e9305d8e49fa4a7c6a24954d</id>
<content type='text'>
Enable CONFIG_DM_SERIAL. uart3 and its pinmux was already
marked with u-boot,dm-spl.
Move preloader_console_init after spl_early_init to make sure driver
model work.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>imx8m: fix reading of DDR4 MR registers</title>
<updated>2022-05-20T07:30:28Z</updated>
<author>
<name>Rasmus Villemoes</name>
<email>rasmus.villemoes@prevas.dk</email>
</author>
<published>2022-04-25T14:22:48Z</published>
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<id>urn:sha1:290ffe57886271a6ac6b7750f70410ee51727f42</id>
<content type='text'>
I was trying to employ lpddr4_mr_read() to something similar to what
the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM
type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c
differs from the private one used by that board in how it extracts the
byte value, and I was only getting zeroes. Adding a bit of debug
printf'ing gives me

 tmp = 0x00ffff00
 tmp = 0x00070700
 tmp = 0x00000000
 tmp = 0x00101000

and indeed I was expecting a (combined) value of 0xff070010 (0xff
being Manufacturer ID for Micron). I can't find any documentation that
says how the values are supposed to be read, but clearly the iot-gate
definition is the right one, both for its use case as well as my
imx8mp-based board.

So lift the private definition of lpddr4_mr_read() from the
imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration
in the ddr.h header where e.g. get_trained_CDD() is already declared.

This has only been compile-tested for the imx8mm-cl-iot-gate
board (since I don't have the hardware), but since I've merely moved
its definition of lpddr4_mr_read(), I'd be surprised if it changed
anything for that board.

Signed-off-by: Rasmus Villemoes &lt;rasmus.villemoes@prevas.dk&gt;
Tested-by: Ying-Chun Liu (PaulLiu) &lt;paul.liu@linaro.org&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>imx8mm-cl-iot-gate: Remove redundant board_fix_fdt()</title>
<updated>2022-04-21T21:00:26Z</updated>
<author>
<name>Ying-Chun Liu (PaulLiu)</name>
<email>paul.liu@linaro.org</email>
</author>
<published>2022-04-20T15:37:07Z</published>
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<id>urn:sha1:84adf929687ece735d6709932583a9603ace75d4</id>
<content type='text'>
In arch/arm/mach-imx/imx8m/soc.c there's an implementation of
board_fix_fdt() introduced by commit 35bb60787b88. Remove the
redundant one to avoid failed to build from source when enabling
CONFIG_OF_BOARD_FIXUP.

Signed-off-by: Ying-Chun Liu (PaulLiu) &lt;paul.liu@linaro.org&gt;
Cc: Fabio Estevam &lt;festevam@gmail.com&gt;
Cc: uboot-imx &lt;uboot-imx@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>capsule: board: Add information needed for capsule updates</title>
<updated>2022-04-15T08:43:18Z</updated>
<author>
<name>Sughosh Ganu</name>
<email>sughosh.ganu@linaro.org</email>
</author>
<published>2022-04-15T05:59:34Z</published>
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<id>urn:sha1:741ef867288bb294039e34ab2287ffe981b05b86</id>
<content type='text'>
Add a structure which defines the information that is needed for
executing capsule updates on a platform. Some information in the
structure like the dfu string is used for making the update process
more robust while some information like the per platform image GUIDs
is used for fixing issues. Initialise this structure in the board
file, and use the information for the capsule updates.

Signed-off-by: Sughosh Ganu &lt;sughosh.ganu@linaro.org&gt;
</content>
</entry>
<entry>
<title>imx8mm-cl-iot-gate: Retrieve the serial number from EEPROM</title>
<updated>2022-04-12T17:10:44Z</updated>
<author>
<name>Fabio Estevam</name>
<email>festevam@denx.de</email>
</author>
<published>2022-04-12T16:05:38Z</published>
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<id>urn:sha1:ea10bea68dee0c3e18cfc508dce03c25d06fc91b</id>
<content type='text'>
The serial number is located at offset 0x14 of the EEPROM
under i2c0 bus at address 0x54.

To print the serial number in Linux:

SERNUM=$(cat /proc/device-tree/serial-number)
echo $SERNUM

Signed-off-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>imx8mm-cl-iot-gate: Retrieve the MAC address from EEPROM</title>
<updated>2022-04-12T17:10:44Z</updated>
<author>
<name>Fabio Estevam</name>
<email>festevam@denx.de</email>
</author>
<published>2022-04-12T16:05:37Z</published>
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<id>urn:sha1:79bc9dcfa2d7d9557f32f9c84712169e041ced70</id>
<content type='text'>
Currently the eth0 MAC address is randomly assigned.

Retrieve the MAC address from EEPROM.

Signed-off-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
<entry>
<title>imx8mm-cl-iot-gate: Retrieve the DDR type from EEPROM</title>
<updated>2022-04-12T17:10:44Z</updated>
<author>
<name>Fabio Estevam</name>
<email>festevam@denx.de</email>
</author>
<published>2022-04-12T16:05:36Z</published>
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<id>urn:sha1:6924bc7ca28f773c32aa3763834e1027f5a9edbf</id>
<content type='text'>
Currently, the DDR type is retrieved by iteracting inside an array
of possible DDR types.

This may take saveral attempts, which slows the overall U-Boot process
and does not provide a good user experience:

U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 1/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x5000010 ]
resetting ...

U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 2/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0x1061010 ]
resetting ...

U-Boot SPL 2021.07 (Feb 28 2022 - 06:39:32 +0000)
DDRINFO: Cfg attempt: [ 3/6 ]
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(T): mr5-8 [ 0xff000010 ]
Normal Boot
WDT:   Not starting
Trying to boot from MMC2
NOTICE:  BL31: v2.5(release):v2.5
NOTICE:  BL31: Built : 07:12:44, Jan 24 2022

Improve the boot time by retrieving the correct DDR information from
the EEPROM:

U-Boot SPL 2022.04-rc4-00045-g6d02bc40d58c (Mar 19 2022 - 08:22:29 -0300)
DDRINFO(D): Kingston 4096G
DDRINFO(M): mr5-8 [ 0xff000010 ]
DDRINFO(E): mr5-8 [ 0xff000010 ]
Normal Boot
WDT:   Started watchdog@30280000 with servicing (60s timeout)
Trying to boot from MMC2
NOTICE:  BL31: v2.5(release):v2.5
NOTICE:  BL31: Built : 22:28:11, Mar 15 2022

Based on the original code from Compulab's U-Boot.

Tested on a imx8mm-cl-iot-gate board populated with 4GB of RAM.

Signed-off-by: Fabio Estevam &lt;festevam@denx.de&gt;
</content>
</entry>
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