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<title>u-boot.git/board/congatec, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>cgtqmx6eval: Fix unused variable warning</title>
<updated>2017-05-12T12:37:24+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-05-09T02:14:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c72fff2682503caba7f545ac5f4edd4bf57859a'/>
<id>9c72fff2682503caba7f545ac5f4edd4bf57859a</id>
<content type='text'>
The variable usdhc2_pads is only referenced during SPL builds, add a guard.

Cc: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
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<pre>
The variable usdhc2_pads is only referenced during SPL builds, add a guard.

Cc: Otavio Salvador &lt;otavio@ossystems.com.br&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Kconfig: Migrate BOARD_LATE_INIT to a select</title>
<updated>2017-01-24T15:35:54+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-01-23T00:43:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e5ec48152ad13ada83c541cdf7f47d5867c506db'/>
<id>e5ec48152ad13ada83c541cdf7f47d5867c506db</id>
<content type='text'>
This option should not really be user selectable.  Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt; (for UniPhier)
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<pre>
This option should not really be user selectable.  Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt; (for UniPhier)
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: conga-qeval20-qa3: Add README to explain the console UART options</title>
<updated>2016-10-11T03:55:33+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-09-09T05:45:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=df233e734fb70076c0434b242594476332208ee0'/>
<id>df233e734fb70076c0434b242594476332208ee0</id>
<content type='text'>
This patch adds a small README to explain the 2 defconfig files and its
usage for the different console UART options.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This patch adds a small README to explain the 2 defconfig files and its
usage for the different console UART options.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mx6: ddr: Allow changing REFSEL and REFR fields</title>
<updated>2016-09-06T16:22:48+00:00</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@nxp.com</email>
</author>
<published>2016-08-29T23:37:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=edf0093732225c2fd0791c3864e9a3eef1f92f19'/>
<id>edf0093732225c2fd0791c3864e9a3eef1f92f19</id>
<content type='text'>
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Reviewed-by: Eric Nelson &lt;eric@nelint.com&gt;
</content>
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<pre>
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Reviewed-by: Eric Nelson &lt;eric@nelint.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: conga-qeval20-qa3: Add SMBus support and SMSC2513 config code</title>
<updated>2016-08-16T03:44:09+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-06-28T13:45:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=303dfc2e5efeaebfb7f01f2e59e5870e645376ca'/>
<id>303dfc2e5efeaebfb7f01f2e59e5870e645376ca</id>
<content type='text'>
This patch includes the following changes:

- Remove Designware I2C support from dts as its not used
- Configure SMBus PADs in dts
- Enable I2C commands and I2C support
- Configure SMSC2513 USB hub via SMBus upon startup
- Move environment location to match Minnowmax example
- Enhancement of the default environment

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch includes the following changes:

- Remove Designware I2C support from dts as its not used
- Configure SMBus PADs in dts
- Enable I2C commands and I2C support
- Configure SMSC2513 USB hub via SMBus upon startup
- Move environment location to match Minnowmax example
- Enhancement of the default environment

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: conga-qeval20-qa3: Add missing MAINTERNERS entry</title>
<updated>2016-08-16T03:44:09+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-08-15T11:51:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f55137fd74e572c6a7556785f34b06471fc44251'/>
<id>f55137fd74e572c6a7556785f34b06471fc44251</id>
<content type='text'>
Add entry for the missing internal UART defconfig to the MAINTAINERS
file.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
CC: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add entry for the missing internal UART defconfig to the MAINTAINERS
file.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
CC: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://www.denx.de/git/u-boot-imx</title>
<updated>2016-07-28T12:45:00+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-07-28T12:45:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4711e7f7af839b41a6d78490257a9e7975494dd3'/>
<id>4711e7f7af839b41a6d78490257a9e7975494dd3</id>
<content type='text'>
</content>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>cgtqmx6eval: Replace is_mx6q() for macro</title>
<updated>2016-07-28T11:27:19+00:00</updated>
<author>
<name>Breno Lima</name>
<email>breno.lima@nxp.com</email>
</author>
<published>2016-07-22T12:12:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=68c276019a6ede6dbb099af7e3e2756579e3b23e'/>
<id>68c276019a6ede6dbb099af7e3e2756579e3b23e</id>
<content type='text'>
It's not necessary to implement the is_mx6q function, there is a macro in
sys_proto.h already implemented.

Signed-off-by: Breno Lima &lt;breno.lima@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
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<pre>
It's not necessary to implement the is_mx6q function, there is a macro in
sys_proto.h already implemented.

Signed-off-by: Breno Lima &lt;breno.lima@nxp.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: conga-qeval20-qa3: Add support for internal UART</title>
<updated>2016-07-12T05:46:01+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-06-15T12:15:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f2a751bebafed498d216f8d9a49d21f0d8335fe3'/>
<id>f2a751bebafed498d216f8d9a49d21f0d8335fe3</id>
<content type='text'>
This patch adds support to enable and use the internal BayTrail UART
instead of the one integrated in the Super IO Winbond chip. For this,
a 2nd defconfig file is added.

This is useful for tests done for the congatec SoM used on baseboards
without such a Super IO chip.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support to enable and use the internal BayTrail UART
instead of the one integrated in the Super IO Winbond chip. For this,
a 2nd defconfig file is added.

This is useful for tests done for the congatec SoM used on baseboards
without such a Super IO chip.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: baytrail: Add .gitignore for ACPI enabled boards</title>
<updated>2016-05-23T07:18:00+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-05-07T14:46:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a47a0827ddc047ec6c722ac4567b4c19e699412'/>
<id>7a47a0827ddc047ec6c722ac4567b4c19e699412</id>
<content type='text'>
Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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