u-boot.git/board/coreboot, branch v2022.04 Unnamed repository; edit this file 'description' to name the repository. x86: Correct the coreboot header file in MAINTAINERS 2022-03-14T07:20:40+00:00 Simon Glass sjg@chromium.org 2022-03-13T06:03:28+00:00 92a3e67ee9b0e1b2294a3d16e851b83440de2a1f This board has its own config header file. Correct it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
This board has its own config header file. Correct it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: coreboot: Support getting a logo from virtio 2021-12-26T22:33:26+00:00 Simon Glass sjg@chromium.org 2021-11-19T20:24:06+00:00 e567122b3253156009aeb6eda1a3d82962877367 Enable this feature so that a splash screen can be provided. Signed-off-by: Simon Glass <sjg@chromium.org> 
Enable this feature so that a splash screen can be provided.

Signed-off-by: Simon Glass <sjg@chromium.org>
x86: coreboot: Use vendor in the Kconfig 2021-07-15T11:50:21+00:00 Simon Glass sjg@chromium.org 2021-06-27T23:51:07+00:00 4dfe4b44cc7f0df78d9013619ec6c411e7b60bbd Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be defined TARGET_COREBOOT. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple
coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be
defined TARGET_COREBOOT.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: coreboot: Show the BIOS date 2021-07-15T11:50:12+00:00 Simon Glass sjg@chromium.org 2021-06-27T23:51:04+00:00 e5bfcab97b3ceaf162c20d94203cc8efa7fea3ff The BIOS version may not be present, e.g. on a Chrome OS build. Add the BIOS date as well, so we get some sort of indication of coreboot's vintage. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
The BIOS version may not be present, e.g. on a Chrome OS build. Add the
BIOS date as well, so we get some sort of indication of coreboot's
vintage.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: Make coreboot sysinfo available to any x86 board 2021-03-27T00:59:37+00:00 Simon Glass sjg@chromium.org 2021-03-15T05:00:18+00:00 e35b6497f417c60cdcaa521eb4cbd3b2bb2e8336 It is possible to boot U-Boot for chromebook_coral either 'bare metal' or from coreboot. In the latter case we want to provide access to the coreboot sysinfo tables. Move the definitions into a file available to any x86 board. Signed-off-by: Simon Glass <sjg@chromium.org> 
It is possible to boot U-Boot for chromebook_coral either 'bare metal' or
from coreboot. In the latter case we want to provide access to the coreboot
sysinfo tables. Move the definitions into a file available to any x86
board.

Signed-off-by: Simon Glass <sjg@chromium.org>
common: Drop asm/global_data.h from common header 2021-02-02T20:33:42+00:00 Simon Glass sjg@chromium.org 2020-10-31T03:38:53+00:00 401d1c4f5d2d29c4bc4beaec95402ca23eb63295 Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> 
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
coreboot: make use of smbios parser 2020-11-05T06:58:45+00:00 Christian Gmeiner christian.gmeiner@gmail.com 2020-11-03T14:34:52+00:00 43a218b65366e225297a20442b49d07129765f73 If u-boot gets used as coreboot payload it might be nice to get vendor, model and bios version from smbios. I am not sure about the output of all the read information. With qemu target for coreboot this could look this: CBFS: Found @ offset 14f40 size 3b188 Checking segment from ROM address 0xffc15178 Checking segment from ROM address 0xffc15194 Loading segment from ROM address 0xffc15178 code (compression=1) New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150 Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150 using LZMA Loading segment from ROM address 0xffc15194 Entry Point 0x01110000 BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms Jumping to boot code at 0x01110000(0x07fa7000) U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200) CPU: x86_64, vendor AMD, device 663h DRAM: 127.1 MiB MMC: Video: No video mode configured in coreboot! Video: No video mode configured in coreboot! Vendor: QEMU Model: Standard PC (i440FX + PIIX, 1996) Bios Version: 4.12-3152-g326a499f6f-dirty Net: e1000: 52:54:00:12:34:56 eth0: e1000#0 No working controllers found Finalizing coreboot Hit any key to stop autoboot: 0 Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
If u-boot gets used as coreboot payload it might be nice to get
vendor, model and bios version from smbios. I am not sure about
the output of all the read information.

With qemu target for coreboot this could look this:

CBFS: Found @ offset 14f40 size 3b188
Checking segment from ROM address 0xffc15178
Checking segment from ROM address 0xffc15194
Loading segment from ROM address 0xffc15178
  code (compression=1)
  New segment dstaddr 0x01110000 memsize 0x889ef srcaddr 0xffc151b0 filesize 0x3b150
Loading Segment: addr: 0x01110000 memsz: 0x00000000000889ef filesz: 0x000000000003b150
using LZMA
Loading segment from ROM address 0xffc15194
  Entry Point 0x01110000
BS: BS_PAYLOAD_LOAD run times (exec / console): 77 / 1 ms
Jumping to boot code at 0x01110000(0x07fa7000)

U-Boot 2020.10-00536-g5dcf7cc590-dirty (Oct 07 2020 - 14:21:51 +0200)

CPU: x86_64, vendor AMD, device 663h
DRAM:  127.1 MiB
MMC:
Video: No video mode configured in coreboot!
Video: No video mode configured in coreboot!
Vendor: QEMU
Model: Standard PC (i440FX + PIIX, 1996)
Bios Version: 4.12-3152-g326a499f6f-dirty
Net:   e1000: 52:54:00:12:34:56
       eth0: e1000#0
No working controllers found
Finalizing coreboot
Hit any key to stop autoboot:  0

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: coreboot: Remove dead code 2020-09-01T05:38:38+00:00 Andy Shevchenko andriy.shevchenko@linux.intel.com 2020-08-20T10:02:23+00:00 85759d04cf04c8541e36b7def334f37c3d42e088 start.S does nothing and can be safely removed. Makefile is still being used by the build system, so simply drop the rule from it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
start.S does nothing and can be safely removed. Makefile is still being used
by the build system, so simply drop the rule from it.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: Add a 64-bit 'coreboot64' build 2020-05-04T07:28:28+00:00 Simon Glass sjg@chromium.org 2020-05-01T13:36:10+00:00 538437ed39e01b7ecfa79669982fe7db51fb2e1b Coreboot is a first-stage bootloader mostly used on x86 devices as an alternative to UEFI. Coreboot runs in 32-bit mode. U-Boot currently supports booting from coreboot as a second-stage bootloader, also in 32-bit mode. However it is useful to be able to run U-Boot in 64-bit mode. To do this we can have a 32-bit SPL which switches over the CPU and jumps to a 64-bit U-Boot proper. Add a new 'coreboot64' board for running 64-bit U-Boot from coreboot. This uses binman to create an image with a 32-bit SPL and a 64-bit U-Boot. This allows running 64-bit EFI images on x86, for example, without needing a native U-Boot port for a board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> 
Coreboot is a first-stage bootloader mostly used on x86 devices as an
alternative to UEFI. Coreboot runs in 32-bit mode.

U-Boot currently supports booting from coreboot as a second-stage
bootloader, also in 32-bit mode. However it is useful to be able to run
U-Boot in 64-bit mode. To do this we can have a 32-bit SPL which switches
over the CPU and jumps to a 64-bit U-Boot proper.

Add a new 'coreboot64' board for running 64-bit U-Boot from coreboot. This
uses binman to create an image with a 32-bit SPL and a 64-bit U-Boot.

This allows running 64-bit EFI images on x86, for example, without needing
a native U-Boot port for a board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
common: Move some board functions out of common.h 2019-12-02T23:25:21+00:00 Simon Glass sjg@chromium.org 2019-11-14T19:57:46+00:00 5255932f0167c502fc7fce527bfe7e81df3322f9 A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> 
A number of board function belong in init.h with the others. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>