u-boot.git/board/cssi, branch v2024.01

board: cssi: Activate SMC relocation on CMPC885 board for MIAE device

2023-05-05T05:26:53+00:00

When CMPC885 board is used for MIAE device, SCC2 SCC3 and SMC2
are used for serial lines. Therefore only SCC4 is available for
handling the TDM line.

In order to use SCC4 in QMC mode without loosing SMC2, SMC2
must be relocated.

Activate SMC relocation and relocate SMC2 at offset 0x1fc0 which
is unused.

Signed-off-by: Christophe Leroy

board: cssi: Load CMPC885's motherboard FPGA earlier

2023-05-04T08:58:07+00:00

In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().

This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.

Console is not available yet so remove the printfs.

Signed-off-by: Christophe Leroy

board: cssi: Remove stale macro from cmpcpro.c

2023-05-04T08:58:07+00:00

Three unused macros were left over. Remove them.

Signed-off-by: Christophe Leroy

board: cssi: Remove duplicated FPGA loading sequence on CMPC885

2023-05-04T08:58:07+00:00

A duplicated FPGA loading sequence appears after FPGA reset.

Remove it.

Fixes: dac3c6f625 ("board: cssi: Add new board MCR3000_2G")
Signed-off-by: Christophe Leroy

board: cssi: Add CPU board CMPCPRO

2023-04-28T15:52:23+00:00

CSSI has another CPU board, similar to the CMPC885 board
that get plugged on the two base boards MCR3000_2G and MIAE.

That CPU board is called CMPCPRO because it has a MPC8321E CPU,
also known as Power QUICC II PRO.

Signed-off-by: Christophe Leroy

board: cssi: Move all mother board code into common.c

2023-04-28T15:52:23+00:00

All the code used to manage the mother boards will be
common to soon to come CPU board.

Move all that code into common.c

Signed-off-by: Christophe Leroy

board: cssi: Refactor EEPROM read

2023-04-28T15:52:23+00:00

On cmpc885 board, the ethernet addresses are stored in an
EEPROM that is accessed through SPI.

A 3 bytes command is sent to the chip then the content
gets read. At the time being a single block access is
performed, ignoring the first 3 bytes read.

Reword the SPI transfer to first send 3 bytes then
receive the content of the EEPROM so that there don't be
3 dummy bytes at the beginning of the buffer.

And move the function into common.c so that it can be
reused by the board that will be added in a future patch.

Signed-off-by: Christophe Leroy

board: cssi: Create dedicated file for common sources

2023-04-28T15:52:23+00:00

In preparation of the new cssi board called cmpcpro which
we be introduce in a future patch, move common
functions into a dedicated file in a common directory.

Signed-off-by: Christophe Leroy

watchdog: mpc8xxx: Make it generic

2023-04-06T12:47:47+00:00

mpc8xx, mpc83xx and mpc86xx have similar watchdog with almost same
memory registers.

Refactor the driver to get the register addresses from the
device tree and use the compatible to know the prescale factor.

Calculate the watchdog setup value from the provided timeout.

Don't declare it anymore as an HW_WATCHDOG, u-boot will start
servicing the watchdog early enough.

On mpc8xx the watchdog configuration register is also used for
configuring the bus monitor. So add it as an option to the watchdog
when it is mpc8xx. When watchdog is not selected, leave the
configuration of the initial SYPCR from Kconfig.

Signed-off-by: Christophe Leroy

board: cssi: Add MIAE & VGoIP devices

2023-02-11T07:47:58+00:00

This adds support for the MIAE and VGoIP devices.
Those devices have the same CPU board that the MCR3000_2G board.

The devices are very modular, they are provided with
interchangeable front and back panels.

Linux kernel is shipped with a device tree which contains all
possible setups, and U-boot eliminates unrelated nodes based on
detected hardware.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy 
Reviewed-by: FRANJOU Stephane