u-boot.git/board/denx, branch master Unnamed repository; edit this file 'description' to name the repository. ARM: atmel: Rename MA5D4EVK 2017-06-29T17:30:27+00:00 Marek Vasut marex@denx.de 2017-05-02T18:27:40+00:00 f1d56dffd7f1a112482cdbe4e0ac2076e1eb3fe1 The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by: Marek Vasut <marex@denx.de> 
The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>
Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2017-04-14T13:05:57+00:00 Tom Rini trini@konsulko.com 2017-04-14T13:05:57+00:00 c1a16c3ab541c014b029b42cc27cae496107e170 






ARM: socfpga: Rename MCVEVK
2017-04-14T12:06:44+00:00

Marek Vasut
marex@denx.de

2017-04-05T11:17:03+00:00

a548bc511f425c9f1213791d020be217221cbe4f

The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>





The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>







Merge git://git.denx.de/u-boot-dm
2017-04-13T21:31:06+00:00

Tom Rini
trini@konsulko.com

2017-04-13T21:31:06+00:00

b7b24a7a3cd74bb165d28a2959ed9143e3648fbf

Here with some DM changes as well as the long-standing AT91 DM/DT
conversion patches which I have picked up via dm.





Here with some DM changes as well as the long-standing AT91 DM/DT
conversion patches which I have picked up via dm.







gpio: at91_gpio: remove CPU_HAS_PIO3 macro
2017-04-13T20:44:50+00:00

Wenyou Yang
wenyou.yang@atmel.com

2017-03-23T04:44:36+00:00

2dc63f73678c18831efce3ec1a383375aa5423f1

The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.

Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>





The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.

Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>







board_f: Drop setup_dram_config() wrapper
2017-04-05T20:36:51+00:00

Simon Glass
sjg@chromium.org

2017-03-31T14:40:32+00:00

76b00aca4f1c13bc8f91a539e612abc70d0c692f

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>





By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>







ARM: mx5: Rename M53EVK
2017-04-05T16:12:20+00:00

Marek Vasut
marex@denx.de

2017-04-05T11:31:02+00:00

2a4058c24061f66ac17f8bff10656a35a91ff66b

The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>





The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>







ARM: mxs: Rename M28EVK
2017-04-05T16:12:04+00:00

Marek Vasut
marex@denx.de

2017-04-05T11:31:01+00:00

fcea480d1d4048c5ba1af236b1ed68162bc17ba6

The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>





The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>







Merge branch 'master' of git://git.denx.de/u-boot-socfpga
2016-10-29T21:16:00+00:00

Tom Rini
trini@konsulko.com

2016-10-29T21:16:00+00:00

4ddc981225288e68d45eb8e33271d1481920086f












arm: socfpga: mcvevk: Adding handoff for SDRAM ctrlcfg.extratime1
2016-10-27T06:03:09+00:00

Chin Liang See
clsee@altera.com

2016-09-21T02:25:58+00:00

b38c1d2f6b11fbfb8eab50522dfc154dbf097956

Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>





Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>