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<title>u-boot.git/board/dhelectronics/dh_imx8mp, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/dhelectronics/dh_imx8mp?h=master</id>
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<updated>2026-04-21T23:49:39Z</updated>
<entry>
<title>board: dhelectronics: imx: Use second Ethernet MAC also from fuse</title>
<updated>2026-04-21T23:49:39Z</updated>
<author>
<name>Christoph Niedermaier</name>
<email>cniedermaier@dh-electronics.com</email>
</author>
<published>2026-04-15T10:12:57Z</published>
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<id>urn:sha1:69d43875759087621449f607f29da4eb86f6b866</id>
<content type='text'>
Currently, the board specific code evaluates only the first Ethernet
MAC address fuse, regardless of whether the first or second MAC
address is requested. When the function to determine the second
Ethernet MAC address is looking for the fused MAC address, it only
reads the first MAC address fuse and increment it by one to set
the second Ethernet MAC address. That is not the expected behavior
when two MAC addresses are fused, because this causes the second
fused MAC address to be ignored. Change this so that the second
fused MAC address will be used.

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Christoph Niedermaier &lt;cniedermaier@dh-electronics.com&gt;
Reviewed-by: Marek Vasut &lt;marex@nabladev.com&gt;
</content>
</entry>
<entry>
<title>arm64: imx8mp: Add 4G 1r DRAM timings on DH i.MX8MP DHCOM SoM</title>
<updated>2026-04-02T12:11:52Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@nabladev.com</email>
</author>
<published>2026-04-01T21:02:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=90f3d2a89f5a1971571d51a87c5f9a51e08e3d4f'/>
<id>urn:sha1:90f3d2a89f5a1971571d51a87c5f9a51e08e3d4f</id>
<content type='text'>
Introduce timing patch which converts 2 GiB DRAM timings to 4 GiB 1-rank
timings. This is a new configuration which carries IS43LQ32K01B DRAM part.
The 512 MiB SoM strapping that was never used is repurposed for this part.

Signed-off-by: Marek Vasut &lt;marex@nabladev.com&gt;
</content>
</entry>
<entry>
<title>arm64: imx8mp: Deduplicate 2G and 4G 2r DRAM timings on DH i.MX8MP DHCOM SoM</title>
<updated>2026-04-02T12:11:51Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@nabladev.com</email>
</author>
<published>2026-04-01T21:02:19Z</published>
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<id>urn:sha1:848f845916a56b940de00cde55dd70ef1ba71870</id>
<content type='text'>
The 2 GiB and 4 GiB 2-rank DRAM timings on i.MX8MP DHCOM are very
similar. Instead of carrying around two copies of almost identical
timing tables, implement a patch of the 2 GiB table to convert it
into 4 GiB 2-rank table and pass the result to DRAM initialization
code. This saves us 13640 Bytes in SPL, and frees up space for more
DRAM initialization tables.

Signed-off-by: Marek Vasut &lt;marex@nabladev.com&gt;
</content>
</entry>
<entry>
<title>arm64: imx8mp: Deduplicate DRAM size tables on DH i.MX8MP DHCOM SoM</title>
<updated>2026-04-02T12:11:51Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@nabladev.com</email>
</author>
<published>2026-04-01T21:02:18Z</published>
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<id>urn:sha1:de3955d8bf117cdd8c917af8bdf9347f70c25f4e</id>
<content type='text'>
The DRAM size tables are shared by SPL and U-Boot proper, deduplicate
those tables into lpddr4_timing.h . No functional change.

Signed-off-by: Marek Vasut &lt;marex@nabladev.com&gt;
</content>
</entry>
<entry>
<title>arm64: imx8mp: Fold inline ECC into spl.c on DH i.MX8MP DHCOM SoM</title>
<updated>2026-04-02T12:11:51Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@nabladev.com</email>
</author>
<published>2026-04-01T21:02:17Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=245d4a60dedfde3a677cbcc4bdccf761a0703216'/>
<id>urn:sha1:245d4a60dedfde3a677cbcc4bdccf761a0703216</id>
<content type='text'>
The inline ECC configuration is identical for 2 GiB DRAM variants
and 4 GiB DRAM variants of the SoM, no matter the rank count. Fold
the ECC configuration directly into spl.c to simplify the upcoming
deduplication. No functional change.

Signed-off-by: Marek Vasut &lt;marex@nabladev.com&gt;
</content>
</entry>
<entry>
<title>treewide: Clean up DECLARE_GLOBAL_DATA_PTR usage</title>
<updated>2026-02-17T19:50:22Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2026-02-09T01:30:18Z</published>
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<id>urn:sha1:0f90b1e715f8abe41b0875752eb184f46032ff11</id>
<content type='text'>
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.

Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.

Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt; #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal &lt;anshuld@ti.com&gt; #TI boards
Acked-by: Yao Zi &lt;me@ziyao.cc&gt; #TH1520
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>board: dhelectronics: Move dh_add_item_number_and_serial_to_env() to common code</title>
<updated>2025-11-17T16:45:11Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@mailbox.org</email>
</author>
<published>2025-10-23T21:48:24Z</published>
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<id>urn:sha1:c5c5d8a4f847e22f6c6b22e6d4ff9abfd2509b00</id>
<content type='text'>
Move dh_add_item_number_and_serial_to_env() to common code, so it
can be used by both STM32MP13xx and iMX8MP DHSOM. No functional
change.

Signed-off-by: Marek Vasut &lt;marek.vasut@mailbox.org&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
</entry>
<entry>
<title>treewide: Remove empty board_init() function from all boards</title>
<updated>2025-07-24T19:30:19Z</updated>
<author>
<name>Sam Protsenko</name>
<email>semen.protsenko@linaro.org</email>
</author>
<published>2025-07-17T02:44:26Z</published>
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<id>urn:sha1:70a4d1fa1ddb2f5f8f9a27442563f182549abbb5</id>
<content type='text'>
Commit 86acdce2ba88 ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.

This cleanup was made semi-automatically using these scripts: [1].

No functional change, but the binary size for the modified boards is
reduced a bit.

[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init

Signed-off-by: Sam Protsenko &lt;semen.protsenko@linaro.org&gt;
Tested-by: Adam Ford &lt;aford173@gmail.com&gt; #imx8mm_beacon
Tested-by: Bryan Brattlof &lt;bb@ti.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;  #NXP boards
</content>
</entry>
<entry>
<title>arm64: imx8mp: Gracefully handle disabled ENV_IS_IN_SPI_FLASH</title>
<updated>2025-03-24T11:55:48Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2025-03-19T03:28:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=31896508d8df4a87ecc09af6c6c61d8b1b5046af'/>
<id>urn:sha1:31896508d8df4a87ecc09af6c6c61d8b1b5046af</id>
<content type='text'>
In case ENV_IS_IN_SPI_FLASH is disabled, returning ENVL_SPI_FLASH
leads to failure to find environment driver on start up. Fix this
by testing whether ENV_IS_IN_SPI_FLASH is enabled and if not, then
return ENVL_NOWHERE instead.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>arm64: imx8mp: Read values from M24C32-D write-lockable page on DHCOM i.MX8MP</title>
<updated>2024-12-07T12:07:44Z</updated>
<author>
<name>Christoph Niedermaier</name>
<email>cniedermaier@dh-electronics.com</email>
</author>
<published>2024-12-06T23:04:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=489b965564ad73c7a2e8f8743908347775c5df3b'/>
<id>urn:sha1:489b965564ad73c7a2e8f8743908347775c5df3b</id>
<content type='text'>
The new i.MX8M Plus DHCOM rev.200 is populated with M24C32-D EEPROM
that contains an additional write-lockable page called ID page, which
is populated with a structure containing ethernet MAC addresses, DH
item number and DH serial number.

Because the write-lockable page is not present on rev.100 i.MX8MP DHCOM
SoM, test whether EEPROM ID page exists by setting up the i2c driver.

There may be multiple EEPROMs with an ID page on this platform, always
use the first one. The evaluation of the EEPROM ID page is done in two
steps. First, the content is read and checked. This is done to cache
the content of the EEPROM ID page. Second, the content is extracted
from the EEPROM buffer by requesting it.

For the ethernet MAC address the i.MX8M Plus DHCOM currently supports
parsing address from multiple sources in the following priority order:

1) U-Boot environment 'ethaddr'/'eth1addr' environment variable
2) SoC OTP fuses
3) On-SoM EEPROM

Add support for parsing the content of this new EEPROM ID page and place
it between 2) and 3) on the priority list. The new entry is 2.5) On-SoM
EEPROM write-lockable page.

Signed-off-by: Christoph Niedermaier &lt;cniedermaier@dh-electronics.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
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