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<title>u-boot.git/board/dhelectronics, branch v2023.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/dhelectronics?h=v2023.07</id>
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<updated>2023-03-30T11:51:55Z</updated>
<entry>
<title>arm64: imx8mm: imx8mn: imx8mp: Drop FEC GPR[1] board workaround</title>
<updated>2023-03-30T11:51:55Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-03-06T14:53:54Z</published>
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<id>urn:sha1:f9cec6da28273114c1d67b98d6b6de7f3305e81d</id>
<content type='text'>
The FEC interface mode is now configured in common board_interface_eth_init()
and called by FEC MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>arm64: imx8mp: Drop EQoS GPR[1] board workaround</title>
<updated>2023-03-30T11:51:33Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-03-06T14:53:53Z</published>
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<id>urn:sha1:599474120a089924aaa502b701600b2fe4b6270c</id>
<content type='text'>
The EQoS interface mode is now configured in common board_interface_eth_init()
and called by EQoS MAC driver when appropriate. Drop the board side duplicates
if the same functionality.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>arm64: imx8mp: Auto-detect PHY on i.MX8MP DHCOM</title>
<updated>2023-03-30T06:40:27Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-02-11T22:10:50Z</published>
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<id>urn:sha1:ef7ceb3ec7bd133b0ea5ba36ef66c8f201dffb4d</id>
<content type='text'>
The i.MX8MP DHCOM SoM may be populated with either KSZ9131RNXI RGMII PHY
or LAN8740Ai RMII PHY attached to EQoS MAC, and either external RGMII PHY
or LAN8740Ai RMII PHY attached to FEC MAC. The SoM configuration can be
detected for each MAC by reading RX_CTL pull resistor state early on boot.
Make use of this, detect the exact PHY configuration, and patch control DT
accordingly so that the ethernet is configured correctly in U-Boot.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM: imx: Add 2 GiB DRAM support for DH electronics i.MX8M Plus DHCOM</title>
<updated>2023-03-30T06:40:27Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-02-11T21:49:01Z</published>
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<id>urn:sha1:f8e413208fcf972d546f9f27ae756e1430279862</id>
<content type='text'>
The DH electronics i.MX8M Plus DHCOM SoM currently supports only 4 GiB
of DRAM population option. Add another population option with 2 GiB of
DRAM. The chips used on the 2 GiB option are 2x K4F6E3S4HM-MGCJ .

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM: imx: Remove PMIC reset configuration from board files</title>
<updated>2023-01-30T22:23:01Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2022-12-09T19:35:47Z</published>
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<id>urn:sha1:a20be24cd4854fb829384f9b45742f7f5d9046c8</id>
<content type='text'>
The PCA9450 reset configuration can now be performed by the PCA9450 PMIC
driver itself, remove the hard-coded variant from board code and let the
PMIC driver perform this task using one-liner:

```
$ sed -i '/set WDOG_B_CFG to cold reset/,+2 d' $(git grep -l PCA9450_RESET_CTRL.*0xA1 board/)
```

Venice and i.MX93 EVK required slight manual fix up.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Fabio Estevam &lt;festevam@denx.de&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: stm32: Add DHCOR based Testbench board</title>
<updated>2022-10-18T06:34:25Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2022-09-26T16:50:00Z</published>
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<id>urn:sha1:0de10e2fe1d6c06e2142f492cce86aad501893b5</id>
<content type='text'>
Add DT for DHCOR Testbench board, which is a testbench for testing of
DHCOR SoM during manufacturing. This is effectively a trimmed down
version of AV96 board with CSI-2 bridge, HDMI bridge, WiFi, Audio and
LEDs removed and used as GPIOs instead. Furthermore, the PMIC Buck3
is always configured from PMIC NVM to cater for both 1V8 and 3V3 SoM
variant.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Cc: Patrick Delaunay &lt;patrick.delaunay@foss.st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: stm32: Remove buck3 regulator-always-on on AV96</title>
<updated>2022-10-18T06:20:35Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2022-09-23T01:31:22Z</published>
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<id>urn:sha1:34be2ada130bc2fcad958794e1c6675625984c3a</id>
<content type='text'>
In case the regulator-always-on is present in regulator DT node,
the regulator is always reconfigured to the voltage set in DT on
probe, even if regulator_set_value() has been called before. Drop
the property from AV96 U-Boot DT and enable the regulator manually
in code, as the board already reconfigures the Buck3 regulator in
code per PMIC NVM content instead.

Fixes: 0adf10a87b1 ("ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96")
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next</title>
<updated>2022-09-26T15:27:30Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-09-26T15:27:30Z</published>
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<id>urn:sha1:ffa2c88bcf8618b6d6fb71f5263beede9a179b20</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlock</title>
<updated>2022-09-20T16:30:02Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2022-09-19T19:37:07Z</published>
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<id>urn:sha1:fdf6bbb260c36bb54826bffb4dd4d62b90c3cede</id>
<content type='text'>
Pull this LPGPR unlock into common code, since it is used in multiple
systems already.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' into next</title>
<updated>2022-09-19T20:07:12Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2022-09-19T17:19:39Z</published>
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<id>urn:sha1:e9a1ff9724348408144c7f1c5b5cc26130ba46e5</id>
<content type='text'>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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