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<title>u-boot.git/board/emulation, branch v2019.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/emulation?h=v2019.04</id>
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<updated>2019-02-27T01:12:33Z</updated>
<entry>
<title>riscv: Rename cpu/qemu to cpu/generic</title>
<updated>2019-02-27T01:12:33Z</updated>
<author>
<name>Anup Patel</name>
<email>Anup.Patel@wdc.com</email>
</author>
<published>2019-02-25T08:14:10Z</published>
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<id>urn:sha1:fdff1f96a6505bccb258f5b52e6c94c7e0b29512</id>
<content type='text'>
The QEMU CPU support under arch/riscv is pretty much generic
and works fine for SiFive Unleashed as well. In fact, there
will be quite a few RISC-V SOCs for which QEMU CPU support
will work fine.

This patch renames cpu/qemu to cpu/generic to indicate the
above fact. If there are SOC specific errata workarounds
required in cpu/generic then those can be done at runtime
in cpu/generic based on CPU vendor specific DT compatible
string.

Signed-off-by: Anup Patel &lt;anup.patel@wdc.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>riscv: qemu: Imply SIFIVE_SERIAL for emulation</title>
<updated>2018-12-18T01:56:54Z</updated>
<author>
<name>Anup Patel</name>
<email>anup@brainfault.org</email>
</author>
<published>2018-12-15T06:05:16Z</published>
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<id>urn:sha1:9acaf60bfdc9c96647772afd42c8150524520fcb</id>
<content type='text'>
This patch enables SiFive UART driver for QEMU RISC-V emulation
by implying SIFIVE_SERIAL on BOARD_SPECIFIC_OPTIONS.

Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>riscv: qemu: Add platform-specific Kconfig options</title>
<updated>2018-12-18T01:56:27Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-12-12T14:12:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=84304d4866c8d69cd1ddb4b5c6cbcc17d6708da0'/>
<id>urn:sha1:84304d4866c8d69cd1ddb4b5c6cbcc17d6708da0</id>
<content type='text'>
Add the QEMU RISC-V platform-specific Kconfig options, to include
CPU and timer drivers.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Anup Patel &lt;anup@brainfault.org&gt;
</content>
</entry>
<entry>
<title>riscv: Add S-mode defconfigs for QEMU virt machine</title>
<updated>2018-12-05T06:14:04Z</updated>
<author>
<name>Anup Patel</name>
<email>anup@brainfault.org</email>
</author>
<published>2018-12-03T05:27:42Z</published>
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<id>urn:sha1:4c6011364735cc1e554a65fd259edc524dbdac9c</id>
<content type='text'>
This patch adds S-mode defconfigs for QEMU virt machine so
that we can run u-boot in S-mode on QEMU using M-mode runtime
firmware (BBL or equivalent).

Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
</content>
</entry>
<entry>
<title>riscv: qemu: Use different SYS_TEXT_BASE for S-mode</title>
<updated>2018-12-05T06:13:59Z</updated>
<author>
<name>Anup Patel</name>
<email>anup@brainfault.org</email>
</author>
<published>2018-12-03T05:27:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ef8c3d3fcec71bdd1d9d64097436041bbd48ba5c'/>
<id>urn:sha1:ef8c3d3fcec71bdd1d9d64097436041bbd48ba5c</id>
<content type='text'>
When u-boot runs in S-mode, the M-mode runtime firmware
(BBL or equivalent) uses memory range in 0x80000000 to
0x80200000. Due to this, we cannot use 0x80000000 as
SYS_TEXT_BASE when running in S-mode. Instead for S-mode,
we use 0x80200000 as SYS_TEXT_BASE.

Even Linux RISC-V kernel ignores/reserves memory range
0x80000000 to 0x80200000 because it runs in S-mode.

Signed-off-by: Anup Patel &lt;anup@brainfault.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
</content>
</entry>
<entry>
<title>riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL</title>
<updated>2018-11-26T05:57:33Z</updated>
<author>
<name>Lukas Auer</name>
<email>lukas.auer@aisec.fraunhofer.de</email>
</author>
<published>2018-11-22T10:26:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=897206c5cc5c6ac0dc2ab851044e42baada3785b'/>
<id>urn:sha1:897206c5cc5c6ac0dc2ab851044e42baada3785b</id>
<content type='text'>
QEMU specifies the location of Linux (supplied with the -kernel
argument) in the device tree using the riscv,kernel-start and
riscv,kernel-end properties. We currently rely on the SBI implementation
of BBL to run Linux and therefore embed Linux as payload in BBL. This
causes an issue, because BBL detects the kernel properties in the device
tree and ignores the Linux payload as a result.
Work around this issue by clearing the kernel properties in the device
tree before booting Linux.

Signed-off-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>riscv: qemu: detect and boot the kernel passed by QEMU</title>
<updated>2018-11-26T05:57:33Z</updated>
<author>
<name>Lukas Auer</name>
<email>lukas.auer@aisec.fraunhofer.de</email>
</author>
<published>2018-11-22T10:26:36Z</published>
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<id>urn:sha1:66ffe5783b6340977ead5782cce9b63edfc0e348</id>
<content type='text'>
QEMU embeds the location of the kernel image in the device tree. Store
this address in the environment as variable kernel_start. It is used in
the board-local distro boot command QEMU to boot the kernel with the
U-Boot device tree. The QEMU boot command is added as the first boot
target device.

Signed-off-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>riscv: qemu: use device tree passed by prior boot stage</title>
<updated>2018-11-26T05:57:32Z</updated>
<author>
<name>Lukas Auer</name>
<email>lukas.auer@aisec.fraunhofer.de</email>
</author>
<published>2018-11-22T10:26:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6e10e94ff7f5b88cba036564b7d8ce7b99265157'/>
<id>urn:sha1:6e10e94ff7f5b88cba036564b7d8ce7b99265157</id>
<content type='text'>
QEMU provides a device tree, which is passed to U-Boot using register
a1. We are now able to directly select the device tree with the
configuration CONFIG_OF_PRIOR_STAGE. Replace the hard-coded address in
qemu-riscv with it.

Signed-off-by: Lukas Auer &lt;lukas.auer@aisec.fraunhofer.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
</entry>
<entry>
<title>x86: qemu: Imply virtio PCI transport and device drivers</title>
<updated>2018-11-14T17:16:28Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-10-15T09:21:20Z</published>
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<id>urn:sha1:c80c7798cfc6032ce6522aded6048f1d3fe93fce</id>
<content type='text'>
Add virtio drivers for QEMU x86 targets.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: qemu: Enumerate virtio bus during early boot</title>
<updated>2018-11-14T17:16:28Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-10-15T09:21:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b9b5956eb08a0ab12702b3bb9304e8157c595442'/>
<id>urn:sha1:b9b5956eb08a0ab12702b3bb9304e8157c595442</id>
<content type='text'>
Currently devices on the virtio bus is not automatically enumerated,
which means peripherals on the virtio bus are not discovered by their
drivers. This uses board_init() to do the virtio enumeration.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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