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<title>u-boot.git/board/emulation, branch v2025.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/emulation?h=v2025.07</id>
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<updated>2025-05-25T09:40:00Z</updated>
<entry>
<title>x86: efi_loader: Ensure the SMBIOS tables are sent via EFI</title>
<updated>2025-05-25T09:40:00Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-05-23T16:55:04Z</published>
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<id>urn:sha1:29c449ccb5bd688bc7a347faca120c6f021e543c</id>
<content type='text'>
The EFI-loader code has not been fully converted to use bloblist, so
relies on the SMBIOS-table address being set in global_data.

Set this up in write_tables() so that the SMBIOS tables are actually
available.

Enable the command for x86 QEMU so that the SMBIOS tests actually run.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Fixes: 83ce35d6ebb ("emulation: Use bloblist to hold tables")
Reported-by: Niklas Sombert &lt;niklas.sombert@uni-duesseldorf.de&gt;
Tested-by: Niklas Sombert &lt;niklas.sombert@uni-duesseldorf.de&gt;
Tested-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</content>
</entry>
<entry>
<title>board: qemu: riscv: Remove duplicated board_fdt_blob_setup</title>
<updated>2025-04-25T08:30:54Z</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-03-07T13:13:42Z</published>
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<id>urn:sha1:1ec65b26cf430c01df773f2532ec142d767edb5b</id>
<content type='text'>
The default version should work for RISC-V QEMU.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>MAINTAINERS: add qemu-riscv* defconfigs to QEMU RISC-V 'VIRT' BOARD</title>
<updated>2025-04-22T18:27:02Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-04-20T08:59:29Z</published>
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<id>urn:sha1:d7820b1cc6d7cbd36fd7b4fb51bf5accacade983</id>
<content type='text'>
Add the follow board to VIRT which otherwise would be unmaintained:

* qemu-riscv64_smode_acpi_defconfig

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</content>
</entry>
<entry>
<title>MAINTAINERS: add all qemu_arm64* defconfigs to VIRT</title>
<updated>2025-04-22T18:27:02Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-04-20T08:59:27Z</published>
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<id>urn:sha1:ac8b4c063d9549b7c714925f6e8170700a400c5a</id>
<content type='text'>
Add the following boards to VIRT which otherwise would be unmaintained.

* qemu_arm64_acpi_defconfig
* qemu_arm64_lwip_defconfig

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "acpi: simplify updating ACPI table header checksum"</title>
<updated>2025-04-08T22:23:27Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-08T21:23:06Z</published>
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<id>urn:sha1:fba8bfdd0bf2db1edd0383ba89a0c6037a6fe807</id>
<content type='text'>
Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt; says:

Introduce a new function to update ACPI table headers.
This allows to simplify the existing code.

Link: https://lore.kernel.org/r/20250321232121.251800-1-heinrich.schuchardt@canonical.com
</content>
</entry>
<entry>
<title>emulation: qemu-sbsa: Fill in correct ITS ID</title>
<updated>2025-04-08T22:23:27Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2025-03-20T12:51:58Z</published>
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<id>urn:sha1:65504478fe44f6dd8b61907efa4eaeba5b79cbf5</id>
<content type='text'>
The ACPI IORT and ACPI MADT needs to use the same IDs when referencing
GIC ITS. The GIC-v3 ITS driver uses dev_seq(dev) to generate a unique ID
for the MADT, but qemu sbsa-ref hardcodes it.
Currently it's not the same ID, breaking interrupt routing on the OS.

Don't assume it's 0 and fetch it from the device instead.

TEST: Fixes non working IRQs in QEMU sbsa-ref.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
</content>
</entry>
<entry>
<title>emulation: qemu-sbsa: Move ITS node into GICv3 node</title>
<updated>2025-04-08T22:23:27Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2025-03-20T12:51:57Z</published>
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<id>urn:sha1:d5a060b01b322231725dfc38090d8dc5e080cd33</id>
<content type='text'>
According to the binding [1] the ITS node should be a subnode of the
GICv3 node. Thus move it now that the driver binds subnodes as well.

1: https://www.kernel.org/doc/Documentation/devicetree/bindings/interrupt-controller/arm%2Cgic-v3.txt

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
</content>
</entry>
<entry>
<title>qemu-sbsa: simplify updating ACPI table header checksum</title>
<updated>2025-04-08T21:22:56Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-03-21T23:21:19Z</published>
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<id>urn:sha1:5eca1696d25f61ad58582820f8477360c81b8b7b</id>
<content type='text'>
Use acpi_update_checksum() to update table header.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Matthias Brugger &lt;mbrugger@suse.com&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>Kconfig: Do not "select OF_SEPARATE"</title>
<updated>2025-04-01T14:45:58Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-03-15T01:28:49Z</published>
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<id>urn:sha1:da20dfb2e901d499fe18c6302987432604e6f999</id>
<content type='text'>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In the case of OF_SEPARATE this is
the default so we do not need to do anything here normally to enforce
this.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>riscv: qemu: imply CONFIG_RNG_RISCV_ZKR</title>
<updated>2025-03-25T08:00:13Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-03-02T08:50:17Z</published>
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<id>urn:sha1:b438e849144181fb4408efde59e73817690a46d6</id>
<content type='text'>
The zkr ISA extension can be used to generate random numbers. Since RVA22
zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
driver detects if the extension is usable during driver binding. Let's
enable it by default on QEMU.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
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