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<title>u-boot.git/board/freescale/common, branch v2009.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/freescale/common?h=v2009.01</id>
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<updated>2008-10-18T19:54:07Z</updated>
<entry>
<title>Make pixis_set_sgmii more general to support MPC85xx boards.</title>
<updated>2008-10-18T19:54:07Z</updated>
<author>
<name>Liu Yu</name>
<email>yu.liu@freescale.com</email>
</author>
<published>2008-10-10T03:40:58Z</published>
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<id>urn:sha1:bff188baf9427c35745356439435acf3864d4c65</id>
<content type='text'>
The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.

Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
PIXIS_VCFGEN1_MASK in header file for both boards.

Signed-off-by: Liu Yu &lt;yu.liu@freescale.com&gt;
</content>
</entry>
<entry>
<title>pixis do not print long help if not configured</title>
<updated>2008-10-18T19:54:05Z</updated>
<author>
<name>Ed Swarthout</name>
<email>Ed.Swarthout@freescale.com</email>
</author>
<published>2008-10-09T04:38:01Z</published>
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<id>urn:sha1:f7fecc3e25050a036c9f50f0d2b85bc3199a96e0</id>
<content type='text'>
Signed-off-by: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;
</content>
</entry>
<entry>
<title>rename CFG_ macros to CONFIG_SYS</title>
<updated>2008-10-18T19:54:03Z</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-16T13:01:15Z</published>
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<id>urn:sha1:6d0f6bcf337c5261c08fabe12982178c2c489d76</id>
<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
</entry>
<entry>
<title>fsl_diu: fix alignment error that caused malloc corruption</title>
<updated>2008-10-14T13:29:37Z</updated>
<author>
<name>Nikita V. Youshchenko</name>
<email>yoush@cs.msu.su</email>
</author>
<published>2008-10-02T20:03:55Z</published>
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<id>urn:sha1:ec4d8c1c1d94a790c1473ae8aace282b817c3123</id>
<content type='text'>
When aligning malloc()ed screen_base, invalid offset was added.
This not only caused misaligned result (which did not cause hardware
misbehaviour), but - worse - caused screen_base + smem_len to
be out of malloc()ed space, which in turn caused breakage of
futher malloc()/free() operation.

This patch fixes screen_base alignment.

Also this patch makes memset() that cleans framebuffer to be executed
on first initialization of diu, not only on re-initialization. It looks
correct to clean the framebuffer instead of displaying random garbage;
I believe that was disabled only because that memset caused breakage
of malloc/free described above - which no longer happens with the fix
described above.

Signed-off-by: Nikita V. Youshchenko &lt;yoush@debian.org&gt;
</content>
</entry>
<entry>
<title>FSL: Fix get_cpu_board_revision() return value.</title>
<updated>2008-10-08T18:19:12Z</updated>
<author>
<name>Rafal Czubak</name>
<email>rcz@semihalf.com</email>
</author>
<published>2008-10-08T11:41:30Z</published>
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<id>urn:sha1:e46c7bfb8bc3c304cedd20f7a365d6e78d7eaf17</id>
<content type='text'>
get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.

The change has been successfully tested on MPC8555CDS system.

Signed-off-by: Rafal Czubak &lt;rcz@semihalf.com&gt;
</content>
</entry>
<entry>
<title>Update Freescale 85xx boards to sys_eeprom.c</title>
<updated>2008-09-09T08:13:35Z</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2008-07-18T14:52:23Z</published>
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<id>urn:sha1:e8d18541c6ceab821f75faab031740b33fdbfa4b</id>
<content type='text'>
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
format, and so it obsoletes board/freescale/common/cds_eeprom.c.  Freescale
86xx boards already use sys_eeprom.c, so this patch migrates the remaining
Freescale 85xx boards to use it as well.  cds_eeprom.c is deleted.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
</content>
</entry>
<entry>
<title>Add pixis_set_sgmii command</title>
<updated>2008-09-03T04:18:15Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-08-31T21:33:30Z</published>
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<id>urn:sha1:5a8a163ac394d9f4f7ff57f415d82bd673b0068c</id>
<content type='text'>
The 8544DS and 8572DS platforms support an optional SGMII riser card to
expose ethernet over an SGMII interface.  Once the card is in, it is also
necessary to configure the board such that it uses the card, rather than
the on-board ethernet ports.  This can either be done by flipping dip switches
on the motherboard, or by modifying registers in the pixis.  Either way
requires a reboot.

This adds a command to allow users to choose which ports are routed through
the SGMII card, and which through the onboard ports.  It also allows users
to revert to the current switch settings.

This code does not work on the 8572, as the PIXIS is different.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</content>
</entry>
<entry>
<title>Add support for Freescale SGMII Riser Card</title>
<updated>2008-09-03T04:18:15Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@freescale.com</email>
</author>
<published>2008-08-31T21:33:28Z</published>
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<id>urn:sha1:652f7c2eef76a1340928bd660845441e932d86a2</id>
<content type='text'>
The 8544DS and 8572DS systems have an optional SGMII riser card which
exposes new ethernet ports which are connected to the eTSECs via an
SGMII interface.  The SGMII PHYs for this board are offset from the standard
PHY addresses, so this code modifies the passed in tsec_info structure to
use the SGMII PHYs on the card, instead.

Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</content>
</entry>
<entry>
<title>Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefile</title>
<updated>2008-07-15T20:22:44Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-07-15T20:22:44Z</published>
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<id>urn:sha1:699f05125509249072a0b865c8d35520d97cd501</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Update Freescale sys_eeprom.c to handle CCID formats</title>
<updated>2008-07-15T15:59:27Z</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2008-06-19T22:56:11Z</published>
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<id>urn:sha1:e2d31fb3450653115452144363d5bde4e5e3e693</id>
<content type='text'>
Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats.  The
NXID format replaces the older CCID format, but it's important to support both
since most boards out there still use the CCID format.  This change is in
preparation for using one file to handle both formats.  This will also unify
EEPROM support for all Freescale 85xx and 86xx boards.

Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
instead of ID_EEPROM_ADDR.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
</content>
</entry>
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