u-boot.git/board/freescale/common, branch v2012.04

sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION option

2012-02-12T09:11:25Z

Since commit 97039ab98 (env_mmc: Allow board code to override the environment address) mmc_get_env_addr is a weak-aliased function in common/env_mmc.c The mmc_get_env_addr implementation that exists at board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards, but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined. Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate this config option on their board file. This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards. Signed-off-by: Fabio Estevam Acked-by: Kumar Gala Acked-by: Stefano Babic

powerpc/p3060qds: Add board related support for P3060QDS platform

2011-11-29T14:48:06Z

The P3060QDS is a Freescale reference board for the six-core P3060 SOC. P3060QDS Board Overview: Memory subsystem: - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus) - 128M Bytes NOR flash single-chip memory - 16M Bytes SPI flash - 8K Bytes AT24C64 I2C EEPROM for RCW Ethernet: - Eight Ethernet controllers (4x1G + 4x1G/2.5G) - Three VSC8641 PHYs on board (2xRGMII + 1xMII) - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3 PCIe: Two PCI Express 2.0 controllers/ports USB: Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board I2C: Four I2C controllers UART: Supports two dUARTs up to 115200 bps for console RapidIO: Two RapidIO, sRIO1 and sRIO2 Signed-off-by: Shengzhou Liu Signed-off-by: York Sun Signed-off-by: Kumar Gala

board/freescale/common/pixis.c: Fix GCC 4.6 build warning

2011-11-11T13:48:59Z

Fix: pixis.c: In function 'strfractoint': pixis.c:383:6: warning: variable 'intarr_len' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala

board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warning

2011-11-11T13:48:59Z

Fix: cds_pci_ft.c: In function 'cds_pci_fixup': cds_pci_ft.c:31:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala

powerpc/mpc85xx: Set SYSCLK to the required frequency

2011-11-11T13:48:54Z

For ICS307-02, there is one general expression to generate SYSCLK: CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD) If we want the required frequency for SYSCLK, we must find one solution to generate this frequency, this solution includes VDW, RDW and OD. For OD, there are only eight option value: 10, 2, 8, 4, 5, 7, 3, 6. For RDW, the range is 1 to 127. For VDW, the range is 4 to 511. First, we use one OD, RDW and required SYSCLK to calculate the VDW, if VDW is in it's range, we will calculate the CLK1Frequency with the OD, RDW and VDW calculated, and we will check this percent (CLK1Frequency / required SYSCLK), and the precision is 1/1000. if the percent is less than 1/1000, we think the CLK1Frequency is we want. Otherwise, We will continue to calculate it with the next OD and RDW. Signed-off-by: Jerry Huang Signed-off-by: Kumar Gala

punt unused clean/distclean targets

2011-10-15T20:20:36Z

The top level Makefile does not do any recursion into subdirs when cleaning, so these clean/distclean targets in random arch/board dirs never get used. Punt them all. MAKEALL didn't report any errors related to this that I could see. Signed-off-by: Mike Frysinger

powerpc/mpc85xxcds: Fix PCI speed

2011-10-03T13:52:14Z

The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui Signed-off-by: Kumar Gala

powerpc/85xx: Refactor P2041RDB to use common p_corenet files

2011-09-30T00:01:06Z

The P2041RDB has almost identical setup for TLB, LAWS, and PCI with other P-Series CoreNet platforms. The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the TLB and LAW setup tables. Signed-off-by: Kumar Gala

powerpc/85xx: refactor common P-Series CoreNet files for FSL boards

2011-09-30T00:01:06Z

We currently support 4 SoC/Boards from the P-Series of QorIQ SoCs that are based on the 'CoreNet' Architecture: P2041RDB, P3041DS, P4080DS, and P5020DS. There is a significant amount of commonality shared between these boards that we can refactor into common code: * Initial LAW setup * Initial TLB setup * PCI setup We start by moving the shared code between P3041DS, P4080DS, and P5020DS into a common directory to be shared with other P-Series CoreNet boards. Signed-off-by: Kumar Gala

powerpc/85xx: Add FMan ethernet support to P4080DS

2011-09-30T00:01:05Z

Add support for RGMII, SGMII, and XAUI (10Gb) Ethernet on P4080DS. The board supports add-on cards for SGMII and XAUI functionality. Which slots on the board these cards are in is a function of the SERDES option selected and muxes on the board. Additionally because of the high-configurablity which MDIO bus one is connected to is "selected" via an FPGA register. We create dummy MDIO bus for the phy layer and hide the mux manipulation in this dummy layer. Add fman fdt helper function in board common code it'll be used by several freescale boards that do various muxing of the MDIO signals based on which controller/interface one is trying to talk to. Removed CONFIG_SYS_FMAN_FW as its not used anywhere. Signed-off-by: Mingkai Hu Signed-off-by: Andy Fleming Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala