u-boot.git/board/freescale, branch v2009.11

mpc8260: move FDT memory node fixup into common CPU code.

2009-11-22T22:16:28Z

Signed-off-by: Marcel Ziswiler Tested-by: Heiko Schocher

86xx: Remove redundant code in initdram

2009-11-05T03:37:12Z

The same code exists both inside an #ifdef and outside of it. Remove the extra code for all the 86xx boards. Signed-off-by: Becky Bruce Signed-off-by: Kumar Gala

Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support"

2009-11-04T15:14:59Z

This reverts commit 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc. There isn't any need to modify the API for fsl_pci_init_port to pass the status of host/agent(end-point) status. We can determine that internally to fsl_pci_init_port. Revert the patch that makes the API change. Signed-off-by: Kumar Gala

mpc85xx: Configure QE USB for MPC8569E-MDS boards

2009-10-27T15:04:17Z

Setup QE pin multiplexing for USB function, configure needed BCSRs and add some fdt fixups. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

mpc85xx: Configure QE UART for MPC8569E-MDS boards

2009-10-27T15:04:11Z

To make QE UART usable by Linux we should setup pin multiplexing and turn UCC2 Ethernet node into UCC2 QE UART node. Also, QE UART is mutually exclusive with UART0, so we can't enable it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype board with eSDHC in 1- or 4-bits mode. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards

2009-10-27T14:44:40Z

SPI Flash (M25P40) is connected to the SPI1 bus, we need a few qe_iop entries to actually enable SPI1 on these boards. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boards

2009-10-27T14:44:37Z

This patch sets memory window for Serial RapidIO on MPC8569E-MDS boards. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

mpc85xx: Add eLBC NAND support for MPC8569E-MDS boards

2009-10-27T14:44:32Z

Simply add some defines, and adjust TLBe setup to include some space for eLBC NAND. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

mpc85xx: Add eSDHC support for MPC8569E-MDS boards

2009-10-27T14:36:48Z

eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2 (in 1-bit mode). When eSDHC is used, we should switch u-boot console to UART1, and make the proper device-tree fixups. Because of an erratum in prototype boards it is impossible to use eSDHC without disabling UART0 (which makes it quite easy to 'brick' the board by simply issung 'setenv hwconfig esdhc', and not able to interact with U-Boot anylonger). So, but default we assume that the board is a prototype, which is a most safe assumption. There is no way to determine board revision from a register, so we use hwconfig. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

ppc/85xx/pci: fsl_pci_init: pcie agent mode support

2009-10-27T14:33:51Z

Originally written by Jason Jin and Mingkai Hu for mpc8536. When QorIQ based board is configured as a PCIe agent, then unlock/enable inbound PCI configuration cycles and init a 4K inbound memory window; so that a PCIe host can access the PCIe agents SDRAM at address 0x0 * Supported in fsl_pci_init_port() after adding pcie_ep as a param * Revamped copyright in drivers/pci/fsl_pci_init.c * Mods in 85xx based board specific pci init after this change Signed-off-by: Vivek Mahajan Signed-off-by: Kumar Gala