u-boot.git/board/freescale, branch v2012.04

i.MX6: arm2: Add AXI cache and Qos setting

2012-04-17T13:41:22Z

Do the same AXI cache and Qos settings done already in the SabreLite imximage.cfg for the ARM2 board, too. It fixes a display flash issue caused by low priority of the display IDMA channel. Signed-off-by: Dirk Behme CC: Jason Chen CC: Jason Liu CC: Stefano Babic CC: Fabio Estevam Acked-by: Jason Liu

Prepare v2012.04-rc2; minor Coding Style cleanup

2012-04-16T21:13:51Z

Signed-off-by: Wolfgang Denk

MX35: mx35pdk: wrong board revision

2012-04-16T12:53:59Z

The board revision is detected accessing to the pmic, that is not available before relocation (I2C). This generates the following error: CPU: Freescale i.MX35 rev 2.0 at 532 MHz. Reset cause: WDOG = 7 is invalid. Should be less than 0 Board: MX35 PDK 1.0 The revision number is wrong, as a default value is printed (tested on a mx35pdk Rev. 2.0). Move the output in the board_late_init(), when pmic can be accessed. Signed-off-by: Stefano Babic

MX31: mx31pdk: drop enable_caches from board file

2012-04-16T12:53:59Z

enable_caches() is implemented now in cpu.c for ARM1136. Signed-off-by: Stefano Babic CC: Fabio Estevam Acked-by: Fabio Estevam

MX53: DDR: Fix ZQHWCTRL field TZQ_CS

2012-04-16T12:53:58Z

Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x02 - 128 cycles. Signed-off-by: Troy Kisky Acked-by: Fabio Estevam

mx53ard: Initialize return code with error

2012-03-27T07:41:17Z

The variable "rc" is the return of board_eth_init() function. Initialize it with an error code, so that this function can return an error when CONFIG_SMC911X is not set. Signed-off-by: Fabio Estevam Acked-by: Stefano Babic

i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG

2012-03-27T07:41:15Z

This is needed to support Freescale-supplied userspaces. At the moment, both the IPU and VPU libraries provided by Freescale in the "imx-lib" package contain routines which scrape the system revision from /proc/cpuinfo. In the VPU library, this information is used to load the proper firmware, allowing a single binary to be used across various i.MX processors. Signed-off-by: Eric Nelson Acked-by: Marek Vasut Acked-by: Stefano Babic

mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment

2012-03-27T07:41:15Z

Signed-off-by: Eric Nelson

mx6qsabrelite: add and enable USB Host 1 support

2012-03-26T21:09:23Z

Cc: Stefano Babic Cc: Jason Liu Signed-off-by: Wolfgang Grandegger

i.mx6q: mx6qsabrelite: Update the network configuration

2012-02-27T20:19:25Z

Define CONFIG_PHY_MICREL, and minimize the tx clock delay. There is an issue with 1000 baseTx mode on early revs of the SabreLite boards. The center tap pin 9 of the mag RJ45 USB combo was connected to the 3.3 filtered supply. Letting this pin float solved the problem. Symptoms of the problem were packets with many extra zeroes tacked on the end, and random bit flips causing a high rate of CRC errors. 10/100 baseTx worked fine on all revs. To disable 1000 baseTx for these boards, simply define the environment variable disable_giga. ie. setenv disable_giga 1 Signed-off-by: Troy Kisky Acked-by: Dirk Behme