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board: gateworks: fsa: bound FSA EEPROM gpio descriptor count

2026-07-27T16:05:07Z

fsa_user_info.gpios[] is a fixed 20-element array, but the number of descriptors iterated and indexed comes from the FSA add-on board EEPROM: board_info.sockgpios and board_info.ioexpgpios are u8 fields (up to 255 each) read via dm_i2c_read() with no upper bound. fsa_config_gpios(), invoked automatically at boot from fsa_init(), loops over info->gpios[i] for i < sockgpios + ioexpgpios, reading past the 20-element array (an out-of-bounds stack read whose contents are then used to configure GPIOs and build names). do_fsa_gpio() validates the console-supplied index only against the same EEPROM counts, so "fsa gpio ..." can memcpy() a descriptor to user_info.gpios[i] for i up to 254 -- an out-of-bounds stack write that is then written back to the EEPROM. A malicious or swapped FSA add-on board EEPROM (only a valid checksum is required, which the attacker can compute) thus yields OOB accesses on the boot path and via the console command. Clamp the descriptor count to ARRAY_SIZE(info->gpios) before iterating, and reject any console index outside the array. Fixes: da9e2218afc2 ("board: venice: add FSA support") Signed-off-by: Christopher Kleiner

rename NET to NET_LEGACY

2026-04-27T17:26:40Z
Highlight that NET really is the legacy networking stack by renaming the option to NET_LEGACY. This requires us to add an SPL_NET_LEGACY alias to SPL_NET as otherwise CONFIG_IS_ENABLED(NET_LEGACY) will not work for SPL. The "depends on !NET_LWIP" for SPL_NET clearly highlights that it is using the legacy networking app so this seems fine to do. This also has the benefit of removing potential confusion on NET being a specific networking stack instead of "any" network stack. Signed-off-by: Quentin Schulz Acked-by: Ilias Apalodimas Reviewed-by: Peter Robinson Reviewed-by: Tom Rini

gw_ventana: Stop disabling device tree relocation

2025-11-29T17:42:24Z
Remove setting of fdt_high to ~0, which disables device tree relocation, from the default environment. Doing so prevents U-Boot from correcting problems such as having an unaligned device tree and leads to various failure modes in the OS. Signed-off-by: Tom Rini Acked-By: Tim Harvey

venice: display DRAM MR registers and decoding if debug enabled

2025-07-17T12:58:42Z
While this is interesting and useful for debugging there isn't extremely useful information so we will only show it if debug is enabled. Signed-off-by: Tim Harvey

venice: lpddr4_timing_imx8mm: update ddr phy config for mscale_v3.10

2025-07-17T12:58:42Z
Update the ddr phy config values to those created by the mscale_v3.10 tool. The original values were obtained using mscale_v3.10. The v3.10 tool removed ddr phy register values of 0x0. This has no functional change but makes comparing and patching ddr configuration easier in addition to slightly shrinking the DRAM config size. Signed-off-by: Tim Harvey

venice: lpddr4_timing_imx8mm: add 4gb single die support

2025-07-17T12:58:42Z
Add dram support for the MT53E1G32D2FW-046 RevC part which is a single die 32Gbit density part vs RevA/B which were dual-die parts: - use a previously unused EEPROM byte to denote a variant of the base config to be patched - add a dram description string - return the board struct from eeprom_init and pass it to the spl_dram_init function so that it has access to the EEPROM - move ddr_init into the spl_dram_init so that it can be patched in the per-soc init function Signed-off-by: Tim Harvey

venice: lpddr4_timing_imx8mm: add DDRC_ADDRMAP7 config

2025-07-17T12:58:42Z
Add the configuration register for DDRC_ADDRMAP7 which was added in the RAP spreadsheet v19. This has no functional change but allows DRAM configuration to be patched in a later commit. Signed-off-by: Tim Harvey

Merge patch series "Hex value prefix case cleanup"

2025-06-14T15:10:48Z
E Shattow says: Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot. There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix or placeholder in documentation and error messages. External devicetree-rebasing dts/upstream and the generated code of xilinx/zynq are ignored for the series. Link: https://lore.kernel.org/r/20250606224558.1117422-1-e@freeshell.de

board: use lowercase hex prefix style

2025-06-14T15:09:39Z
Use consistent lowercase hex prefix style in board/* Does not change auto-generated files in xilinx/zynq/*/ps7_init_gpl.c Signed-off-by: E Shattow

board: venice: append configuration string to model

2025-05-30T22:10:56Z
Append the optional board configuration string to the model info. Signed-off-by: Tim Harvey Reviewed-by: Peng Fan