u-boot.git/board/google, branch v2015.04 Unnamed repository; edit this file 'description' to name the repository. x86: Rename MMCONF_BASE_ADDRESS and make it common across x86 2015-02-06T05:16:43+00:00 Simon Glass sjg@chromium.org 2015-01-28T05:13:33+00:00 2d934e5703b712686c3ec67f6d5eeb137c68805d This setting will be used by more than just ivybridge so make it common. Also rename it to PCIE_ECAM_BASE which is a more descriptive name. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
This setting will be used by more than just ivybridge so make it common.

Also rename it to PCIE_ECAM_BASE which is a more descriptive name.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: Move CONFIG_SYS_CAR_xxx to Kconfig 2015-01-13T15:25:04+00:00 Bin Meng bmeng.cn@gmail.com 2015-01-06T14:14:19+00:00 24ef04280cc9730679d390acb41bb02487527303 Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that we don't need them in the board configuration file thus the same board configuratoin file can be used to build both coreboot version and bare version. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that
we don't need them in the board configuration file thus the same
board configuratoin file can be used to build both coreboot version
and bare version.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig 2015-01-13T15:25:03+00:00 Bin Meng bmeng.cn@gmail.com 2015-01-06T14:14:15+00:00 8cb20ccc34cda9fdcbae962744bf8ecee90dd5d2 Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig options so that we can remove them from board configuration file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig
options so that we can remove them from board configuration file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
x86: ich6-gpio: Add Intel Tunnel Creek GPIO support 2014-12-19T00:26:06+00:00 Bin Meng bmeng.cn@gmail.com 2014-12-17T07:50:38+00:00 b71eec3129c2626bfb1e98141b317d958e3cf384 Intel Tunnel Creek GPIO register block is compatible with current ich6-gpio driver, except the offset and content of GPIO block base address register in the LPC PCI configuration space are different. Use u16 instead of u32 to store the 16-bit I/O address of the GPIO registers so that it could support both Ivybridge and Tunnel Creek. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address register in the LPC PCI configuration space are different.

Use u16 instead of u32 to store the 16-bit I/O address of the GPIO
registers so that it could support both Ivybridge and Tunnel Creek.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
x86: ich6-gpio: Move setup_pch_gpios() to board support codes 2014-12-14T05:32:04+00:00 Bin Meng bmeng.cn@gmail.com 2014-12-12T13:05:23+00:00 2795573a8c9c62db7b4bcf4bddf54d73b6ae61d3 Movie setup_pch_gpios() in the ich6-gpio driver to the board support codes, so that the driver does not need to know any platform specific stuff (ie: include the platform specifc chipset header file). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Movie setup_pch_gpios() in the ich6-gpio driver to the board support
codes, so that the driver does not need to know any platform specific
stuff (ie: include the platform specifc chipset header file).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
x86: Make ROM_SIZE configurable in Kconfig 2014-12-14T05:32:03+00:00 Bin Meng bmeng.cn@gmail.com 2014-12-12T13:05:19+00:00 64542f4616c484142b90534f9f174a632d7d1904 Currently the ROM_SIZE is hardcoded to 8MB in arch/x86/Kconfig. This will not be the case when adding additional board support. Hence we make ROM_SIZE configurable (512KB/1MB/2MB/4MB/8MB/16MB) and have the board Kconfig file select the default ROM_SIZE. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
Currently the ROM_SIZE is hardcoded to 8MB in arch/x86/Kconfig. This
will not be the case when adding additional board support. Hence we
make ROM_SIZE configurable (512KB/1MB/2MB/4MB/8MB/16MB) and have the
board Kconfig file select the default ROM_SIZE.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
x86: chromebook_link: Enable the Chrome OS EC 2014-11-25T14:11:17+00:00 Simon Glass sjg@chromium.org 2014-11-15T03:56:45+00:00 22e131ca00ed42cd7485aa1821dc3051bd762a3e Enable the Chrome OS EC so that it can be used from U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> 
Enable the Chrome OS EC so that it can be used from U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Remove board_early_init_r() 2014-11-25T13:33:59+00:00 Simon Glass sjg@chromium.org 2014-11-15T01:18:22+00:00 65990d568074ad878cbc7e4eb1053508e3707cb6 This function is not needed. Remove it to improve the generic init sequence slightly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
This function is not needed. Remove it to improve the generic init sequence
slightly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: chromebook_link: Enable GPIO support 2014-11-21T06:34:15+00:00 Simon Glass sjg@chromium.org 2014-11-13T05:42:25+00:00 437c2b7cd04f017cf79dcde63e7d9035f8cd99e5 Enable GPIO support and provide the required GPIO setup information to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> 
Enable GPIO support and provide the required GPIO setup information to
the driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
x86: chromebook_link: Implement CAR support (cache as RAM) 2014-11-21T06:34:11+00:00 Simon Glass sjg@chromium.org 2014-11-13T05:42:10+00:00 70a09c6c3dc25b200a9d0475afcf5dfc9836b18e Add support for CAR so that we have memory to use prior to DRAM init. On link there is a total of 128KB of CAR available, although some is used for the memory reference code. Signed-off-by: Simon Glass <sjg@chromium.org> 
Add support for CAR so that we have memory to use prior to DRAM init.
On link there is a total of 128KB of CAR available, although some is
used for the memory reference code.

Signed-off-by: Simon Glass <sjg@chromium.org>