<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/board/intel/minnowmax, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/intel/minnowmax?h=v2017.09</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/board/intel/minnowmax?h=v2017.09'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-08-01T12:17:02Z</updated>
<entry>
<title>x86: kconfig: Let board select SPI flash</title>
<updated>2017-08-01T12:17:02Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-07-30T13:23:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1df7f0b6a00c2080c50de775b4ef621aad24c47e'/>
<id>urn:sha1:1df7f0b6a00c2080c50de775b4ef621aad24c47e</id>
<content type='text'>
Only a specific type of SPI flash exists on a board, having board
Kconfig to select the SPI flash seems to make more sense. Other
flash types are not necessary except coreboot, which implies all
available flash drivers there.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig</title>
<updated>2017-08-01T12:17:02Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-07-30T13:23:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5d89b37f71ff1833bdd34eeba6dbac6bec1c9fb2'/>
<id>urn:sha1:5d89b37f71ff1833bdd34eeba6dbac6bec1c9fb2</id>
<content type='text'>
This is architecture-dependent early initialization hence should
be put in the platform Kconfig.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: minnowmax: Configure GPIO pins to turn on USB ports VBUS</title>
<updated>2017-06-22T06:58:10Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-06-16T13:31:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=70b95ded03bc13715e595c3a87ec323d9d1dfc62'/>
<id>urn:sha1:70b95ded03bc13715e595c3a87ec323d9d1dfc62</id>
<content type='text'>
GPIO bank E pin 8 &amp; 9 are used to control the on-board two USB ports
VBUS on/off. Let's configure them in the misc_init_r().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Add .gitignore for ACPI enabled boards</title>
<updated>2016-05-23T07:18:00Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-05-07T14:46:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a47a0827ddc047ec6c722ac4567b4c19e699412'/>
<id>urn:sha1:7a47a0827ddc047ec6c722ac4567b4c19e699412</id>
<content type='text'>
Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Enable ACPI table generation for all boards</title>
<updated>2016-05-23T07:18:00Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-05-07T14:46:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ad3098f7b8167915f59c2a2cb59fdac26730f601'/>
<id>urn:sha1:ad3098f7b8167915f59c2a2cb59fdac26730f601</id>
<content type='text'>
Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Drop all the old pin configuration code</title>
<updated>2016-03-17T02:27:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-03-12T05:07:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=779653b0cbe3f634632bc4ecae1ce5df84638326'/>
<id>urn:sha1:779653b0cbe3f634632bc4ecae1ce5df84638326</id>
<content type='text'>
We don't need this anymore - we can use device tree and the new pinconfig
driver instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Convert minnowmax to use CONFIG_DM_NET</title>
<updated>2015-08-14T15:50:11Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-11T04:02:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8098bc1c14ca397291209e0281f0862ddc6f057'/>
<id>urn:sha1:b8098bc1c14ca397291209e0281f0862ddc6f057</id>
<content type='text'>
Move to driver model for networking on minnowmax.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Support operation as an EFI payload</title>
<updated>2015-08-05T14:44:08Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-04T18:34:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b4302582f309b49a08c770960a37af6fe1f3afb3'/>
<id>urn:sha1:b4302582f309b49a08c770960a37af6fe1f3afb3</id>
<content type='text'>
Disable a few things which interfere with the EFI init. This allows the
Minnowboard MAX to boot into EFI, load a U-Boot payload then boot to the
U-Boot prompt.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: minnowmax: Remove smsc47x superio codes</title>
<updated>2015-08-05T14:42:39Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-07-30T10:49:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=456ee909d63a35daa51b70231c4abffa4709e9f3'/>
<id>urn:sha1:456ee909d63a35daa51b70231c4abffa4709e9f3</id>
<content type='text'>
On Intel BayTrail SoC, there is a legacy UART (I/O 0x3f8) integrated
into the SoC which is enabled by the FSP. Remove the smsc47x superio
initialization codes.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: minnowmax: initialize the pin-muxing from device tree</title>
<updated>2015-06-04T09:32:23Z</updated>
<author>
<name>Gabriel Huau</name>
<email>contact@huau-gabriel.fr</email>
</author>
<published>2015-05-12T06:18:25Z</published>
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<id>urn:sha1:5d3c2c542dd8878fece0ea96edde125635b492ff</id>
<content type='text'>
Signed-off-by: Gabriel Huau &lt;contact@huau-gabriel.fr&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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