u-boot.git/board/intel, branch v2016.09

x86: bayleybay: Add PS/2 keyboard and mouse to ASL file

2016-08-16T03:44:09+00:00

Without PS/2 keyboard and mouse in the ASL file, Windows does not
see them. No problem for Linux as it probes keyboard and mouse via
the legacy 8042 I/O port.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass

x86: galileo: Enable ACPI table generation

2016-05-30T02:21:12+00:00

Enable ACPI table generation by creating a DSDT table.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass

x86: galileo: Override SMBIOS product name

2016-05-23T07:27:43+00:00

Override the default product name U-Boot reports in the SMBIOS
table, to be compatible with the Intel provided UEFI BIOS, as
Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
it to do different board level configuration.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass

x86: baytrail: Add .gitignore for ACPI enabled boards

2016-05-23T07:18:00+00:00

Let git ignore dsdt.aml, dsdt.asl.tmp and dsdt.c files.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
Reviewed-by: Simon Glass

x86: baytrail: Enable ACPI table generation for all boards

2016-05-23T07:18:00+00:00

Enable ACPI table generation by creating a DSDT table for all baytrail
boards: conga-qeval20-qa3-e3845, bayleybay and minnowmax.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Tested-by: Stefan Roese 
Reviewed-by: Simon Glass

x86: Drop all the old pin configuration code

2016-03-17T02:27:25+00:00

We don't need this anymore - we can use device tree and the new pinconfig
driver instead.

Signed-off-by: Simon Glass 
Reviewed-by: Bin Meng

x86: Move common LPC code to its own place

2016-03-17T02:27:24+00:00

Some of the LPC code is common to several Intel LPC devices. Move it into a
common location.

Signed-off-by: Simon Glass 
Reviewed-by: Bin Meng

x86: Add Intel Cougar Canyon 2 board

2016-02-21T05:42:52+00:00

This adds basic support to Intel Cougar Canyon 2 board, a board
based on Chief River platform with an Ivy Bridge processor and
a Panther Point chipset.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass

x86: Drop asm/arch/gpio.h

2016-02-05T04:47:21+00:00

asm/arch/gpio.h is not needed anymore as we get the GPIO base from
PCH driver.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
Tested-by: Simon Glass

x86: Enable PCIe controller on quark/galileo

2015-09-09T13:48:03+00:00

Quark SoC holds the PCIe controller in reset following a power on.
U-Boot needs to release the PCIe controller from reset. The PCIe
controller (D23:F0/F1) will not be visible in PCI configuration
space and any access to its PCI configuration registers will cause
system hang while it is held in reset.

Enable PCIe controller per Quark firmware writer guide.

Signed-off-by: Bin Meng 
Acked-by: Simon Glass