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<title>u-boot.git/board/is1, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/is1?h=v2017.09</id>
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<updated>2016-10-27T06:03:10Z</updated>
<entry>
<title>arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1</title>
<updated>2016-10-27T06:03:10Z</updated>
<author>
<name>Chin Liang See</name>
<email>clsee@altera.com</email>
</author>
<published>2016-09-21T02:26:00Z</published>
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<id>urn:sha1:6f94fa21cc7552dae9bf452e12eaa85c8897fcbb</id>
<content type='text'>
Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.

Signed-off-by: Chin Liang See &lt;clsee@altera.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
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</entry>
<entry>
<title>ARM: socfpga: add support for IS1 board</title>
<updated>2016-06-08T00:56:30Z</updated>
<author>
<name>Pavel Machek</name>
<email>pavel@denx.de</email>
</author>
<published>2016-06-07T10:37:23Z</published>
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<id>urn:sha1:35546f6f2014282cc4f9772324b5588bd44a2938</id>
<content type='text'>
This adds support for IS1 board. Pretty usual socfpga board,
256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
additional ethernet ports connected to the FPGA.

Signed-off-by: Pavel Machek &lt;pavel@denx.de&gt;
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</entry>
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