u-boot.git/board/kosagi, branch v2016.09 Unnamed repository; edit this file 'description' to name the repository. mx6: ddr: Allow changing REFSEL and REFR fields 2016-09-06T16:22:48+00:00 Fabio Estevam fabio.estevam@nxp.com 2016-08-29T23:37:15+00:00 edf0093732225c2fd0791c3864e9a3eef1f92f19 Currently MX6 SPL DDR initialization hardcodes the REF_SEL and REFR fields of the MDREF register as 1 and 7, respectively for DDR3 and 0 and 3 for LPDDR2. Looking at the MDREF initialization done via DCD we see that boards do need to initialize these fields differently: $ git grep 0x021b0020 board/ board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */ board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800 board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800 board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800 So introduce a mechanism for users to be able to configure REFSEL and REFR fields as needed. Keep all the mx6 SPL users in their current REF_SEL and REFR values, so no functional changes for the existing users. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com> 
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
arm: imx6: Enable DDR calibration on Novena 2016-02-02T19:59:05+00:00 Marek Vasut marex@denx.de 2015-12-16T14:40:07+00:00 89d485940106c095ec69ecb12a78a42e096dece7 Enable the DDR calibration functionality on Novena to deal with the memory SoDIMM on this board. Moreover, tweak the initial DDR DRAM parameters so the calibration works properly. Signed-off-by: Marek Vasut <marex@denx.de> 
Enable the DDR calibration functionality on Novena to deal with the
memory SoDIMM on this board. Moreover, tweak the initial DDR DRAM
parameters so the calibration works properly.

Signed-off-by: Marek Vasut <marex@denx.de>
arm: imx6: novena, gw_ventana: Fix use of pfuze100 bit definitions 2015-12-01T15:09:51+00:00 Marek Vasut marex@denx.de 2015-11-26T13:08:50+00:00 18e02ffe5e626fe409ca9427e368c879f6ee450c The following patch changed the PFUZE100 swbst register bit definitions and broke PMIC configuration on multiple boards, at least on the novena and gw_ventana. This patch fixes it. commit 8fa46350a4c7dca7710362f6c871098557b934ad Author: Peng Fan <Peng.Fan@freescale.com> Date: Fri Aug 7 16:43:45 2015 +0800 power: regulator: add pfuze100 support Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Peng Fan <Peng.Fan@freescale.com> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Vagrant Cascadian <vagrant@aikidev.net> Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com> Tested-by: Vagrant Cascadian <vagrant@aikidev.net> Reviewed-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Tim Harvey <tharvey@gateworks.com> 
The following patch changed the PFUZE100 swbst register bit definitions
and broke PMIC configuration on multiple boards, at least on the novena
and gw_ventana. This patch fixes it.

commit 8fa46350a4c7dca7710362f6c871098557b934ad
Author: Peng Fan <Peng.Fan@freescale.com>
Date:   Fri Aug 7 16:43:45 2015 +0800

    power: regulator: add pfuze100 support

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Vagrant Cascadian <vagrant@aikidev.net>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
Tested-by: Vagrant Cascadian <vagrant@aikidev.net>
Reviewed-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
input: Support the German keymap 2015-11-20T03:13:41+00:00 Simon Glass sjg@chromium.org 2015-11-11T17:05:37+00:00 b1d7a1875e2f96417a2ecd7ebe1680f650c2be22 Add support for the German keymap, taken from i8042.c. This can be selected when the input library it initialised. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Add support for the German keymap, taken from i8042.c. This can be selected
when the input library it initialised.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
input: Add the keycode translation tables separately 2015-11-20T03:13:40+00:00 Simon Glass sjg@chromium.org 2015-10-19T03:17:13+00:00 66877b0f5fc96906d70f1264b3b8102d2156360f Require the caller to add the keycode translation tables separately so that it can select which ones to use. In a later patch we will add the option to add German tables. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Require the caller to add the keycode translation tables separately so that
it can select which ones to use. In a later patch we will add the option to
add German tables.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
novena: Remove empty reset_cpu() 2015-11-12T16:26:33+00:00 Fabio Estevam fabio.estevam@freescale.com 2015-11-03T00:21:34+00:00 115866c599d7efd54a7c24c7ab288b30e082ba5d There is really no need to provide an empty reset_cpu() implementation, so just remove it. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> 
There is really no need to provide an empty reset_cpu() implementation,
so just remove it.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
video: Drop DEV_FLAGS_SYSTEM flag 2015-11-05T07:22:21+00:00 Bin Meng bmeng.cn@gmail.com 2015-11-04T07:23:37+00:00 1caf934a0504013874238445daaea7f32c36ab04 DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> 
DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
mx6: remove SYS_SOC from board Kconfig 2015-09-13T08:37:29+00:00 Peng Fan Peng.Fan@freescale.com 2015-09-07T06:59:48+00:00 f20562e4c40adc3a16cfce4d7715e77969eccd0a Remove duplicated SYS_SOC Kconfig entry from board Kconfig, because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: "Eric Bénard" <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Marek Vasut <marex@denx.de> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com> Acked-by: Markus Niebel <Markus.Niebel@tq-group.com> Acked-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> 
Remove duplicated SYS_SOC Kconfig entry from board Kconfig,
because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
arm: mx6: novena: Add proper LVDS display support 2014-12-30T13:10:31+00:00 Marek Vasut marex@denx.de 2014-12-16T13:09:23+00:00 331ae846ad9fee532cf04268da76701093e4e4ed Repair the register configuration and add proper support for the display attached to both LVDS channels. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Sean Cross <xobs@kosagi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> 
Repair the register configuration and add proper support for the
display attached to both LVDS channels.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
arm: mx6: novena: Pull video handling into separate file 2014-12-30T13:06:43+00:00 Marek Vasut marex@denx.de 2014-12-16T13:09:22+00:00 f2e4d6a58cafb219b1850c3db1238887109cd94d Pull all of the video handling into a separate file, since a lot more code will be added and such code would polute the board file. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Sean Cross <xobs@kosagi.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> 
Pull all of the video handling into a separate file, since a lot
more code will be added and such code would polute the board file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>