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<title>u-boot.git/board/mimc, branch v2010.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/mimc?h=v2010.09</id>
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<updated>2010-09-03T13:13:02Z</updated>
<entry>
<title>avr32: Add simple paging support</title>
<updated>2010-09-03T13:13:02Z</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>haavard.skinnemoen@atmel.com</email>
</author>
<published>2010-08-12T06:52:54Z</published>
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<id>urn:sha1:1f36f73fe70560a2bd286a7abc8530fdc93af9ae</id>
<content type='text'>
Use the MMU hardware to set up 1:1 mappings between physical and virtual
addresses. This allows us to bypass the cache when accessing the flash
without having to do any physical-to-virtual address mapping in the CFI
driver.

The virtual memory mappings are defined at compile time through a sorted
array of virtual memory range objects. When a TLB miss exception
happens, the exception handler does a binary search through the array
until it finds a matching entry and loads it into the TLB. The u-boot
image itself is covered by a fixed TLB entry which is never replaced.

This makes the 'saveenv' command work again on ATNGW100 and other boards
using the CFI driver, hopefully without breaking any rules.

Signed-off-by: Haavard Skinnemoen &lt;haavard.skinnemoen@atmel.com&gt;
</content>
</entry>
<entry>
<title>avr32: Use uncached() macro to get an address for SDRAM init</title>
<updated>2010-09-03T13:12:52Z</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>haavard.skinnemoen@atmel.com</email>
</author>
<published>2010-08-12T06:52:53Z</published>
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<id>urn:sha1:9cec2fc209a000655af77256a39ede7c7d441e56</id>
<content type='text'>
The paging system which is required to set up caching properties has not
yet been initialized when the SDRAM is initialized. So when the
map_physmem() function is converted to return the physical address
unchanged, the SDRAM initialization will break on some boards.

The avr32-specific uncached() macro will return an address which will
always cause uncached accessed to be made. Since this happens in the
board code, using avr32-specific features should be ok, and will allow
the SDRAM initialization to keep working.

Signed-off-by: Haavard Skinnemoen &lt;haavard.skinnemoen@atmel.com&gt;
</content>
</entry>
<entry>
<title>avr32: Move cpu/at32ap/* to arch/avr32/cpu/*</title>
<updated>2010-04-13T07:13:25Z</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2010-04-13T03:28:15Z</published>
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<id>urn:sha1:8a15c2d10b0b784f0cfba1240f06a4d933b975fa</id>
<content type='text'>
Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</content>
</entry>
<entry>
<title>MIMC200: reduce LCD pixclock</title>
<updated>2009-08-11T11:58:26Z</updated>
<author>
<name>Mark Jackson</name>
<email>mpfj-list@mimc.co.uk</email>
</author>
<published>2009-08-11T10:33:47Z</published>
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<id>urn:sha1:54e399f110bbaa24e662e6dd9e88ddb86989d668</id>
<content type='text'>
The initial pixclock for the MIMC200 board is wrong (and causes
screen corruption due to DMA underruns).

This patch simply reduces the pixel clock to fix the problem.

Signed-off-by: Mark Jackson &lt;mpfj@mimc.co.uk&gt;
</content>
</entry>
<entry>
<title>mimc200.c: fix too long lines added by f68378d6</title>
<updated>2009-07-26T11:16:28Z</updated>
<author>
<name>Anatolij Gustschin</name>
<email>agust@denx.de</email>
</author>
<published>2009-07-26T09:04:59Z</published>
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<id>urn:sha1:bcf0b5248952c6b03081dc5cc4ff9e0b2299c5fa</id>
<content type='text'>
Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
</entry>
<entry>
<title>Add LCD support to MIMC200 board</title>
<updated>2009-07-26T11:14:33Z</updated>
<author>
<name>Mark Jackson</name>
<email>mpfj-list@mimc.co.uk</email>
</author>
<published>2009-07-21T10:35:22Z</published>
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<id>urn:sha1:f68378d60a905d43155f2e89bf81999d3c93a90a</id>
<content type='text'>
This patch updates the MIMC200 files to enable the LCD.

Signed-off-by: Mark Jackson &lt;mpfj@mimc.co.uk&gt;
</content>
</entry>
<entry>
<title>Merge branch 'mimc200'</title>
<updated>2009-03-23T09:22:41Z</updated>
<author>
<name>Haavard Skinnemoen</name>
<email>haavard.skinnemoen@atmel.com</email>
</author>
<published>2009-03-23T09:22:41Z</published>
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<id>urn:sha1:8206bfae3ab7f99965136384360ba2de0c6f4c3b</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix all linker script to handle all rodata sections</title>
<updated>2009-03-20T21:39:12Z</updated>
<author>
<name>Trent Piepho</name>
<email>xyzzy@speakeasy.org</email>
</author>
<published>2009-02-18T23:22:05Z</published>
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<id>urn:sha1:f62fb99941c625605aa16a0097b396a5c16d2c88</id>
<content type='text'>
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho &lt;xyzzy@speakeasy.org&gt;
</content>
</entry>
<entry>
<title>Setup extra MIMC200 chip selects</title>
<updated>2009-02-23T10:16:14Z</updated>
<author>
<name>Mark Jackson</name>
<email>mpfj-list@mimc.co.uk</email>
</author>
<published>2009-02-13T15:48:18Z</published>
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<id>urn:sha1:58a518c3d8a2c7de11d414e8b903495daee7dc7e</id>
<content type='text'>
Added code to setup the extra Flash and FRAM chip selects as used on the
MIMC200 board.

V2 moves the init code from the common "cpu.c" file into the board specific
setup file.

Signed-off-by: Mark Jackson &lt;mpfj@mimc.co.uk&gt;
Signed-off-by: Haavard Skinnemoen &lt;haavard.skinnemoen@atmel.com&gt;
</content>
</entry>
<entry>
<title>MIMC200: tidy GCLK init code</title>
<updated>2009-02-23T10:13:55Z</updated>
<author>
<name>Mark Jackson</name>
<email>mpfj@mimc.co.uk</email>
</author>
<published>2008-11-24T12:10:56Z</published>
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<id>urn:sha1:80534886a72a0088eef9e781a8e0b7d04ea41f36</id>
<content type='text'>
Change the MIMC200 startup code to use the built-in (rather than
hard-coded) funtions for setting up gclk outputs.

We'll also move the code to the new, more-appropriate
board_postclk_init() routine.

Signed-off-by: Mark Jackson &lt;mpfj@mimc.co.uk&gt;
Signed-off-by: Haavard Skinnemoen &lt;haavard.skinnemoen@atmel.com&gt;
</content>
</entry>
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