u-boot.git/board/mpc8540ads, branch origin Unnamed repository; edit this file 'description' to name the repository. Patches by Jon Loeliger, 24 Aug 2004: 2004-10-10T21:21:55+00:00 wdenk wdenk 2004-10-10T21:21:55+00:00 03f5c55021c2d6297e66cc11bfea75f149a5d71c - Add support for the MPC8541 and MPC8555 CDS boards - Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR 
- Add support for the MPC8541 and MPC8555 CDS boards
- Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
* Patch by Jon Loeliger, 24 Aug 2004: 2004-10-10T20:23:57+00:00 wdenk wdenk 2004-10-10T20:23:57+00:00 cf33678e51e02143ed67850b3f13646fd51fb489 - Fix PCI window on MPC85xx; remove unneeded PCI initialization from board_early_init_f() - Provide SW workaround for PCI initialization on 85xx CDS - Convert MPC85xxADS to use common CFI flash driver * Cleanup: avoid compiler warnings * Add CMC PU2 board to MAKEALL script 
  - Fix PCI window on MPC85xx; remove unneeded PCI initialization
    from board_early_init_f()
  - Provide SW workaround for PCI initialization on 85xx CDS
  - Convert MPC85xxADS to use common CFI flash driver

* Cleanup: avoid compiler warnings

* Add CMC PU2 board to MAKEALL script
Patch by Jon Loeliger, 16 Jul 2004: 2004-08-01T23:02:45+00:00 wdenk wdenk 2004-08-01T23:02:45+00:00 9aea95307fdb0ffe0d3a98a17ac73e5040c9756a - support larger DDR memories up to 2G on the PC8540/8560ADS and STXGP3 boards - Made MPC8540/8560ADS be 33Mhz PCI by default. - Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16 and CONFIG_L2_INIT_RAM options. - Refactor Local Bus initialization out of SDRAM setup. - Re-implement new version of LBC11/DDR11 errata workarounds. - Moved board specific PCI init parts out of CPU directory. - Added TLB entry for PCI-1 IO Memory - Updated README.mpc85xxads 
- support larger DDR memories up to 2G on the PC8540/8560ADS and
  STXGP3 boards
- Made MPC8540/8560ADS be 33Mhz PCI by default.
- Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16
  and CONFIG_L2_INIT_RAM options.
- Refactor Local Bus initialization out of SDRAM setup.
- Re-implement new version of LBC11/DDR11 errata workarounds.
- Moved board specific PCI init parts out of CPU directory.
- Added TLB entry for PCI-1 IO Memory
- Updated README.mpc85xxads
Patch by Jon Loeliger, 17 June 2004: 2004-07-09T23:27:13+00:00 wdenk wdenk 2004-07-09T23:27:13+00:00 0ac6f8b7498d3608bd1de2280a014e9e23d7b1f2 Completion of the 8540ADS/8560ADS updates: Fix some PCI and Rapid I/O memory maps, Initialize both TSEC 1 and 2, Initialize SDRAM Update MAINTAINER for 85xx boards and README.mpc85xxads 
Completion of the 8540ADS/8560ADS updates:
Fix some PCI and Rapid I/O memory maps,
Initialize both TSEC 1 and 2,
Initialize SDRAM
Update MAINTAINER for 85xx boards and README.mpc85xxads
Patches Part 1 by Jon Loeliger, 11 May 2004: 2004-06-09T00:34:46+00:00 wdenk wdenk 2004-06-09T00:34:46+00:00 97d80fc3912e517ee40e269abf534a006025da5c Dynamically handle REV1 and REV2 MPC85xx parts. (Jon Loeliger, 10-May-2004). New consistent memory map and Local Access Window across MPC85xx line. New CCSRBAR at 0xE000_0000 now. Add RAPID I/O memory map. New memory map in README.MPC85xxads (Kumar Gala, 10-May-2004) Better board and CPU identification on MPC85xx boards at boot. (Jon Loeliger, 10-May-2004) SDRAM clock control fixes on MPC8540ADS & MPC8560 boards. Some configuration options for MPC8540ADS & MPC8560ADS cleaned up. (Jim Robertson, 10-May-2004) Rewrite of the MPC85xx Three Speed Ethernet Controller (TSEC) driver. Supports multiple PHYs. (Andy Fleming, 10-May-2004) Some README.MPC85xxads updates. (Kumar Gala, 10-May-2004) Copyright updates for "Freescale" (Andy Fleming, 10-May-2004) 
Dynamically handle REV1 and REV2 MPC85xx parts.
  (Jon Loeliger, 10-May-2004).
New consistent memory map and Local Access Window across MPC85xx line.
New CCSRBAR at 0xE000_0000 now.
Add RAPID I/O memory map.
New memory map in README.MPC85xxads
  (Kumar Gala, 10-May-2004)
Better board and CPU identification on MPC85xx boards at boot.
  (Jon Loeliger, 10-May-2004)
SDRAM clock control fixes on MPC8540ADS & MPC8560 boards.
Some configuration options for MPC8540ADS & MPC8560ADS cleaned up.
  (Jim Robertson, 10-May-2004)
Rewrite of the MPC85xx Three Speed Ethernet Controller (TSEC) driver.
Supports multiple PHYs.
  (Andy Fleming, 10-May-2004)
Some README.MPC85xxads updates.
  (Kumar Gala, 10-May-2004)
Copyright updates for "Freescale"
  (Andy Fleming, 10-May-2004)
* The PS/2 mux on the BMS2003 board needs 450 ms after power on 2004-01-20T23:12:12+00:00 wdenk wdenk 2004-01-20T23:12:12+00:00 c837dcb1a316745092567bfe4fb266d0941884ff before we can access it; add delay in case we are faster (with no CF card inserted) * Cleanup of some init functions * Make sure SCC Ethernet is always stopped by the time we boot Linux to avoid Linux crashes by early packets coming in. * Accelerate flash accesses on LWMON board by using buffered writes 
  before we can access it; add delay in case we are faster (with no
  CF card inserted)

* Cleanup of some init functions

* Make sure SCC Ethernet is always stopped by the time we boot Linux
  to avoid Linux crashes by early packets coming in.

* Accelerate flash accesses on LWMON board by using buffered writes
* Patches by Xianghua Xiao, 15 Oct 2003: 2003-10-15T23:53:47+00:00 wdenk wdenk 2003-10-15T23:53:47+00:00 42d1f0394bef0624fc9664714d54bb137931d6a6 - Added Motorola CPU 8540/8560 support (cpu/85xx) - Added Motorola MPC8540ADS board support (board/mpc8540ads) - Added Motorola MPC8560ADS board support (board/mpc8560ads) * Minor code cleanup 
  - Added Motorola CPU 8540/8560 support (cpu/85xx)
  - Added Motorola MPC8540ADS board support (board/mpc8540ads)
  - Added Motorola MPC8560ADS board support (board/mpc8560ads)

* Minor code cleanup