u-boot.git/board/nvidia/common, branch v2012.07 Unnamed repository; edit this file 'description' to name the repository. tegra: add pin_mux_spi() board initialization function 2012-07-09T20:44:33+00:00 Stephen Warren swarren@nvidia.com 2012-06-12T08:33:40+00:00 e02849488724bdfdc36ef8105c59a49986db3ebc Boards can override this to set up the pinmux correctly to access serial flash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Boards can override this to set up the pinmux correctly to access serial
flash.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches 2012-07-09T20:44:32+00:00 Tom Warren twarren.nvidia@gmail.com 2012-06-01T08:22:14+00:00 1e2d7859758499a25fa392deb5cfda95372d97ae Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> 
Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and
one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
tegra: Allow boards to perform early GPIO setup 2012-07-09T20:44:32+00:00 Thierry Reding thierry.reding@avionic-design.de 2012-06-04T20:02:27+00:00 cb7a1cf36a59772670adcd2c90cee40c2ed1bc60 The new gpio_early_init() function, which does nothing by default, can be overridden by boards to configure GPIOs at an early stage. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
The new gpio_early_init() function, which does nothing by default, can
be overridden by boards to configure GPIOs at an early stage.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
spi: tegra2: rename tegra2_spi.* to tegra_spi.* 2012-07-07T12:07:20+00:00 Tom Warren twarren.nvidia@gmail.com 2012-05-22T07:33:47+00:00 edffa63d3d6e76991998789f9fcbaa483731ca65 In anticipation of Tegra3 support, start removing/renaming Tegra2-specific files. No functional changes (yet). Also updated copyright to 2012. Signed-off-by: Tom Warren <twarren@nvidia.com> 
In anticipation of Tegra3 support, start removing/renaming
Tegra2-specific files. No functional changes (yet).
Also updated copyright to 2012.

Signed-off-by: Tom Warren <twarren@nvidia.com>
spi: Tegra2: Seaboard: fix UART corruption during SPI transactions 2012-07-07T12:07:17+00:00 Tom Warren twarren@nvidia.com 2012-05-15T21:32:40+00:00 078078cfa91f72331421e6f7a46938a58a9b21a7 Simon Glass's proposal to fix this on Seaboard was NAK'd, so I removed his NS16550 references and added a small delay before SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes and saw no corruption (crc's matched) and no spurious comm chars. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Jimmy Zhang <jimmzhang@nvidia.com> 
Simon Glass's proposal to fix this on Seaboard was NAK'd, so I
removed his NS16550 references and added a small delay before
SPI/UART muxing. Tested on my Seaboard with large SPI reads/writes
and saw no corruption (crc's matched) and no spurious comm chars.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
tegra: Add EMC settings for Seaboard 2012-05-15T06:31:38+00:00 Jimmy Zhang jimmzhang@nvidia.com 2012-04-10T05:17:06+00:00 c5b34a29acb17343479ace6219e8ae55677a9a26 Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Set Seaboard to optimal memory settings based on the SOC in use (T20 or T25).

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: Turn off power detect in board init 2012-05-15T06:31:38+00:00 Wei Ni wni@nvidia.com 2012-04-02T13:18:58+00:00 5aff021c61fffa9f6a58038db98e8dc29598813b Tegra core power rail has leakage voltage around 0.2V while system in suspend mode. The source of the leakage should be coming from PMC power detect logic for IO rails power detection. That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0' to PWR_DET (APBDEV_PMC_PWR_DET_0). Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Tegra core power rail has leakage voltage around 0.2V while system in
suspend mode. The source of the leakage should be coming from PMC power
detect logic for IO rails power detection.
That can be disabled by writing a '0' to PWR_DET_LATCH followed by writing '0'
to PWR_DET (APBDEV_PMC_PWR_DET_0).

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: Set up warmboot code on Nvidia boards 2012-05-15T06:31:38+00:00 Simon Glass sjg@chromium.org 2012-04-02T13:18:57+00:00 67ac5797adb1fad3b027058100cd6fa58c5b6cb6 Call the function to put warmboot boot in a suitable place for resume. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Call the function to put warmboot boot in a suitable place for resume.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: Set up PMU for Nvidia boards 2012-05-15T06:31:38+00:00 Simon Glass sjg@chromium.org 2012-04-02T13:18:54+00:00 8723626dd9fcee629ddbd4d96d6d910b2301422d Adjust PMU to permit maximum frequency operation. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Adjust PMU to permit maximum frequency operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: i2c: Initialise I2C on Nvidia boards 2012-03-29T06:12:50+00:00 Simon Glass sjg@chromium.org 2012-02-03T15:13:57+00:00 cb445fb4ccd5f1b3e0bf416ca0bafd90a5b2a2b0 This enables I2C on all Nvidia boards including Seaboard and Harmony. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com> 
This enables I2C on all Nvidia boards including Seaboard and
Harmony.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>