u-boot.git/board/nvidia/dts, branch v2012.10 Unnamed repository; edit this file 'description' to name the repository. tegra: enable NAND on Harmony 2012-09-07T20:54:31+00:00 Stephen Warren swarren@nvidia.com 2012-07-30T07:37:52+00:00 9614a1e9636976add95730c2da569ac1b274f232 Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: fdt: Add NAND definitions to fdt 2012-09-07T20:54:30+00:00 Simon Glass sjg@chromium.org 2012-07-29T20:53:28+00:00 7cedd1811a9ab3ebfe2a8f56239648c1a3fa61d5 Add a flash node to handle the NAND, including memory timings and page / block size information. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Add a flash node to handle the NAND, including memory timings and
page / block size information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra20: rename tegra2 -> tegra20 2012-09-01T12:58:21+00:00 Allen Martin amartin@nvidia.com 2012-08-31T08:30:00+00:00 00a2749d7be5b0e6cb6435187ec8fea600b44627 This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com> 
This is make naming consistent with the kernel and devicetree and in
preparation of pulling out the common tegra20 code.

Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: ventana: add own device tree, enable USB 2012-07-07T12:07:19+00:00 Stephen Warren swarren@nvidia.com 2012-05-23T07:46:15+00:00 b1b9e4ce3af6d10c8442bff48b69cad151ddff82 Add a device tree for Ventana; the Seaboard file no longer represents the HW present on Ventana. Enable USB on Ventana. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Add a device tree for Ventana; the Seaboard file no longer represents
the HW present on Ventana.

Enable USB on Ventana.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: harmony: add device tree support 2012-07-07T12:07:19+00:00 Stephen Warren swarren@nvidia.com 2012-05-21T10:04:27+00:00 f3d93309c1ab0fe22e3229f99dbcfa7c857eb067 ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 
... to enable USB host support, which enables Ethernet support.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: Whistler board support 2012-07-07T12:07:17+00:00 Stephen Warren swarren@nvidia.com 2012-05-15T06:45:28+00:00 d5ebc937c90b95f52bd85c15ce74edff4df2e0be Whistler is a highly configurable Tegra evaluation and development board. This change adds support for the following specific configuration: E1120 motherboard E1108 CPU board E1116 PMU board The motherboard configuration switches are set as follows: SW1=0 SW2=0 SW3=5 S1/S2/S3/S4 all on, except S3 7/8 are off. Other combinations of daugher boards may work to varying degrees, but will likely require some SW adjustment. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Whistler is a highly configurable Tegra evaluation and development board.
This change adds support for the following specific configuration:

E1120 motherboard
E1108 CPU board
E1116 PMU board

The motherboard configuration switches are set as follows:
SW1=0 SW2=0 SW3=5
S1/S2/S3/S4 all on, except S3 7/8 are off.

Other combinations of daugher boards may work to varying degrees, but will
likely require some SW adjustment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: fdt: Add keyboard definitions for Seaboard 2012-05-15T06:31:40+00:00 Anton Staff robotboy@chromium.org 2012-04-17T09:01:34+00:00 c3ab91f064f64991d0b4f9dd5e87bfe2d24dfc7e Seaboard uses a QUERTY keyboard. We add key codes for this to enable key scanning to work. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Seaboard uses a QUERTY keyboard. We add key codes for this to
enable key scanning to work.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: fdt: Add EMC data for Tegra2 Seaboard 2012-05-15T06:31:39+00:00 Simon Glass sjg@chromium.org 2012-04-05T11:55:15+00:00 d376e8d2283fc82d7366bc9c0e96110e3e5665e9 This adds timings for T20 and T25 Seaboards, using the bindings found here: http://patchwork.ozlabs.org/patch/132928/ We supply both full speed options for normal running, and half speed options for testing / development. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
This adds timings for T20 and T25 Seaboards, using the bindings found here:

http://patchwork.ozlabs.org/patch/132928/

We supply both full speed options for normal running, and half speed options
for testing / development.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: i2c: Select I2C ordering for Seaboard 2012-03-29T06:12:50+00:00 Simon Glass sjg@chromium.org 2012-02-29T07:31:27+00:00 3682cc3d2c3af73dd8e343dd41c5b860a658ac46 Select the port ordering for I2C on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
Select the port ordering for I2C on Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard 2012-03-29T06:12:48+00:00 Simon Glass sjg@chromium.org 2012-02-27T10:52:46+00:00 1920172ec80b709d017608b6a1d40b766e84c731 We set up two USB ports, one of which can be host or device. For some reason the kernel version does enable both ports. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com> 
We set up two USB ports, one of which can be host or device.
For some reason the kernel version does enable both ports.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>