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<title>u-boot.git/board/nvidia/dts, branch v2013.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/nvidia/dts?h=v2013.04</id>
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<updated>2013-04-15T23:13:51Z</updated>
<entry>
<title>Tegra: T30: Beaver board support.</title>
<updated>2013-04-15T23:13:51Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2013-04-12T18:20:51Z</published>
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<id>urn:sha1:601795462a4e7ede97b64dc306de1002e688eef6</id>
<content type='text'>
Beaver is a Tegra30 board that is nearly 100% compatible w/Cardhu.
Add a Beaver build so it can begin to be differentiated, if need be.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)</title>
<updated>2013-03-25T16:56:07Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2013-03-18T21:46:46Z</published>
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<id>urn:sha1:e9cd20654c1ce3112cac0f369640a74f694618a3</id>
<content type='text'>
Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra114: dalmore: fdt: enable dalmore SPI controller</title>
<updated>2013-03-25T16:56:07Z</updated>
<author>
<name>Allen Martin</name>
<email>amartin@nvidia.com</email>
</author>
<published>2013-03-16T18:58:12Z</published>
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<id>urn:sha1:af77fdb2ce7184104c6eb5a7b981def549c771e0</id>
<content type='text'>
Dalmore has a SPI flash part attached to controller 4, so enable
controller 4 and set to 25MHz.

Signed-off-by: Allen Martin &lt;amartin@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra114: fdt: Move aliases from dtsi to dts file as per other Tegras</title>
<updated>2013-03-14T18:49:07Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2013-03-12T00:07:21Z</published>
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<id>urn:sha1:5647c0343176d8ea257abf44211c493ef139d3e8</id>
<content type='text'>
All other Tegra boards have their alias nodes in the .dts file

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra30: fdt: Add SDMMC (sdhci) nodes for T30 boards (Cardhu for now)</title>
<updated>2013-03-14T18:06:44Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2013-02-26T18:14:17Z</published>
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<id>urn:sha1:1baa4e72c63f8038bb2f874827bebee0eef58fe7</id>
<content type='text'>
Took these values directly from the kernel dts files.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra30: fdt: Sync DT nodes with kernel DT files (I2C, SPI, GPIO, clock)</title>
<updated>2013-03-14T18:06:43Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren.nvidia@gmail.com</email>
</author>
<published>2013-02-21T13:33:23Z</published>
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<id>urn:sha1:527519ae69cdde6386754015f986f99604f2c9a7</id>
<content type='text'>
Minor edits to clock, apbdma and SPI, make I2C match kernel DT, and add gpio

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra: fdt: Remove memreserve line from Cardhu/Seaboard DT files</title>
<updated>2013-03-14T18:06:42Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren.nvidia@gmail.com</email>
</author>
<published>2013-02-21T12:40:29Z</published>
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<id>urn:sha1:73bb24439441d4a52e031c81f32a460ceab15421</id>
<content type='text'>
Not used, and wrong in Cardhu's case

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files</title>
<updated>2013-03-14T18:06:42Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren.nvidia@gmail.com</email>
</author>
<published>2013-02-21T12:31:29Z</published>
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<id>urn:sha1:126685ad44ad39895567884458b3a4581acf8902</id>
<content type='text'>
Linux dts files were used for those boards that didn't already
have sdhci info populated. Tamonten has their own dtsi file with
common sdhci nodes (sourced from Linux).

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Tested-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra: fdt: Change /include/ to #include for C preprocessor</title>
<updated>2013-03-14T18:06:42Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren.nvidia@gmail.com</email>
</author>
<published>2013-02-21T12:31:27Z</published>
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<id>urn:sha1:6c5be646b47e0dfea3df5a08948f50d1c5d37f68</id>
<content type='text'>
dts Makefile has the arch &amp; board include paths added to DTS_CPPFLAGS.
This allows the use of '#include "xyz"' in the dts/dtsi file which
helps the C preprocessor find common dtsi include files.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra114: fdt: Update DT files with I2C info for T114/Dalmore</title>
<updated>2013-03-14T18:06:41Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren.nvidia@gmail.com</email>
</author>
<published>2013-02-08T07:25:31Z</published>
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<id>urn:sha1:b77c3547e867f7876b3f970125c45d556588d9cb</id>
<content type='text'>
T114, like T30, does not have a separate/different DVC (power I2C)
controller like T20 - all 5 I2C controllers are identical, but
I2C5 is used to designate the controller intended for power
control (PWR_I2C in the schematics). PWR_I2C is set to 400KHz.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Acked-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
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