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<title>u-boot.git/board/nvidia, branch v2013.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/nvidia?h=v2013.01-rc2</id>
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<updated>2012-10-29T16:07:05Z</updated>
<entry>
<title>ARM: tegra: don't request GPIO from Seaboard's SPL</title>
<updated>2012-10-29T16:07:05Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-10-22T06:19:36Z</published>
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<id>urn:sha1:a2ab6b7d320423ab4d925d75c588c2a13fce61c6</id>
<content type='text'>
Seaboard has a GPIO that switches an external mux between Tegra's debug
UART and SPI flash. This is initialized from the SPL so that SPL debug
output can be seen. Simplify the code that does this, and don't actually
request the GPIO in the SPL; just program it. This saves ~4.5K from the
size of the SPL, mostly BSS due to the large gpio_names[] table that is
no longer required. This makes Seaboard's SPL fit within the current max
size.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Allen Martin &lt;amartin@nvidia.com&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: select between Seaboard/Ventana at compile time</title>
<updated>2012-10-29T16:07:05Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-10-22T06:19:35Z</published>
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<id>urn:sha1:da1f735272aaccf201b7d289c86fe8c6ff848f4f</id>
<content type='text'>
Seaboard and Ventana are very similar boards, and so share the seaboard.c
board file. The one difference needed so far is detected at run-time by
calling machine_is_ventana(). This bloats the Ventana build with code
that is never used. Switch to detecting Ventana at compile time to remove
bloat. This shaves ~5K off the SPL size on Ventana, and makes the SPL fit
within the max size.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Whistler: remove unused USB alias</title>
<updated>2012-10-29T16:07:05Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-10-12T09:45:50Z</published>
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<id>urn:sha1:56f42f85f5a14040fb0e74fd6cad3910643830d6</id>
<content type='text'>
Port USB1 on Whistler is intended as a device port for USB recovery.
Whistler's DT currently contains an alias for this USB port, even though
Whistler's config doesn't enable multiple USB controllers, so the alias
is unused. Remove the unused alias for consistency for now. Similar,
explicitly disable the port in the device tree too.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Harmony: enable ULPI USB port</title>
<updated>2012-10-29T16:07:04Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-10-12T09:45:48Z</published>
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<id>urn:sha1:699c40e8789cfbb5c3ca4ef2849a4bd051ff79bb</id>
<content type='text'>
The ULPI port is routed onto pins on the mini PCI Express connector. A
standard breakout board may be used to access the port.

* Add required DT entries to configure the ULPI port.
* Setup up the ULPI pinmux in the board code.
* Enable multiple USB controller and ULPI support in the board config.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: move common features to a common makefile</title>
<updated>2012-10-29T16:07:04Z</updated>
<author>
<name>Marc Dietrich</name>
<email>marvin24@gmx.de</email>
</author>
<published>2012-10-03T04:26:28Z</published>
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<id>urn:sha1:73286d8729c0a2325911719492218477caa2c58e</id>
<content type='text'>
For Non-Nvidia boards to include newly added features (like emc clock
scaling) it would be necessary to add each feature to their own board
Makefile. This is because currently the top Makefile automaticly includes
these features only for Nvidia boards.

This patch adds a simple Makefile include so all new features become
available for non-Nvidia board vendors.

Cc: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Tom Warren &lt;twarren@nvidia.com&gt;
Cc: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Cc: Lucas Stach &lt;dev@lynxeye.de&gt;
Signed-off-by: Marc Dietrich &lt;marvin24@gmx.de&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: nand: add board pinmux</title>
<updated>2012-10-15T18:54:07Z</updated>
<author>
<name>Lucas Stach</name>
<email>dev@lynxeye.de</email>
</author>
<published>2012-09-29T10:02:09Z</published>
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<id>urn:sha1:c0720afbb56f91fd33fb5b4e564e1037809c6304</id>
<content type='text'>
Boards may require a different pinmux setup for NAND than the default one.
Add a way to call into board specific code to set this up.

Signed-off-by: Lucas Stach &lt;dev@lynxeye.de&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: clean up board include hell</title>
<updated>2012-10-15T18:54:07Z</updated>
<author>
<name>Lucas Stach</name>
<email>dev@lynxeye.de</email>
</author>
<published>2012-09-29T10:02:08Z</published>
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<id>urn:sha1:516f00b3240b678947389ccfbff54a5ebcc9b941</id>
<content type='text'>
The prototypes used in board files were all scattered out, which lead to
code duplication between SPL and normal U-Boot and some prototypes not actually
being used. Consolidate this in a common board header.

Signed-off-by: Lucas Stach &lt;dev@lynxeye.de&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra20: rework UART GPIO handling</title>
<updated>2012-10-15T18:54:07Z</updated>
<author>
<name>Lucas Stach</name>
<email>dev@lynxeye.de</email>
</author>
<published>2012-09-25T20:21:14Z</published>
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<id>urn:sha1:0cd10c7abf3d210c921a0e5c86c2abdbf98c68c5</id>
<content type='text'>
Rename board provided gpio_config_uart() to
gpio_early_init_uart() as it does the same thing as the equally
called function provided by the uart-switch code. This allows
to simply call this function in early board init whether or not
we are building with CONFIG_UART_SWITCH defined.

Also provide a weak symbol for this function, to avoid the
need to provide this function for boards that don't need any
fixup.

This patch supersedes the earlier posted
"tegra: convert gpio_config_uart to weak symbol".
Build tested with MAKEALL -s tegra20

Signed-off-by: Lucas Stach &lt;dev@lynxeye.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra20: Move some include files to arch-tegra for sharing with Tegra30</title>
<updated>2012-10-15T18:54:06Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2012-09-19T22:50:56Z</published>
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<id>urn:sha1:150c24936b70ce36e11069038ba8e955704cab3a</id>
<content type='text'>
The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h.
Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines &amp; structs
that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20'
'root' file.

All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>Tegra: Change Tegra20 to Tegra in common code, prep for T30</title>
<updated>2012-09-10T20:01:24Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren@nvidia.com</email>
</author>
<published>2012-09-05T00:00:24Z</published>
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<id>urn:sha1:29f3e3f24832fccdd7ce5fa961bc4d4005b07381</id>
<content type='text'>
Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
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