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<title>u-boot.git/board/openpiton, branch v2022.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/openpiton?h=v2022.07</id>
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<updated>2021-07-07T12:34:02Z</updated>
<entry>
<title>riscv: dts: add OpenPiton RISC-V board dts support</title>
<updated>2021-07-07T12:34:02Z</updated>
<author>
<name>Tianrui Wei</name>
<email>tianrui-wei@outlook.com</email>
</author>
<published>2021-07-07T07:48:22Z</published>
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<id>urn:sha1:c9135d5a7af2df0e273e0f7e2f6c8132b34aba82</id>
<content type='text'>
Previous device tree for OpenPiton emits a warning during compilation.
This commit fixes the previous warning adds dts to the OpenPiton RISC-V
board and added the device tree to MAINTAINER file.

Signed-off-by: Tianrui Wei &lt;tianrui-wei@outlook.com&gt;
Reported-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>board: riscv: add openpiton-riscv64 SoC support</title>
<updated>2021-07-06T05:50:56Z</updated>
<author>
<name>Tianrui Wei</name>
<email>tianrui-wei@outlook.com</email>
</author>
<published>2021-07-01T04:54:19Z</published>
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<id>urn:sha1:8a44fe69439438797b93b2e7dd70e1a8fad31519</id>
<content type='text'>
This patch adds openpiton-riscv64 SOC support. In particular, this
board supports a standard bootflow through zsbl-&gt;u-boot SPL-&gt;
opensbi-&gt;u-boot proper-&gt;Linux. There are separate defconfigs for
building u-boot SPL and u-boot proper

Signed-off-by: Tianrui Wei &lt;tianrui-wei@outlook.com&gt;
Signed-off-by: Jonathan Balkind &lt;jbalkind@ucsb.edu&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
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