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<title>u-boot.git/board/phytec/common/Makefile, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/phytec/common/Makefile?h=v2025.04</id>
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<updated>2024-11-26T02:08:02Z</updated>
<entry>
<title>board: phytec: imx93: Add eeprom-based hardware introspection</title>
<updated>2024-11-26T02:08:02Z</updated>
<author>
<name>Christoph Stoidner</name>
<email>c.stoidner@phytec.de</email>
</author>
<published>2024-11-20T16:31:42Z</published>
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<id>urn:sha1:d3b9b799688968d947200b75ea964144ddf1b984</id>
<content type='text'>
The phyCORE-i.MX 93 is available in various variants. Relevant variant
options for the spl/u-boot are:
- with or without HS400 support for the eMMC
- with 1GB ram chip, or 2GB ram chip

The phyCORE's eeprom contains all information about the existing variant
options. Add evaluation of the eeprom data to the spl/u-boot to
enable/disable HS400 and to select the appropriate ram configuration at
startup.

Signed-off-by: Christoph Stoidner &lt;c.stoidner@phytec.de&gt;
Reviewed-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
Reviewed-by: Yannic Moog &lt;y.moog@phytec.de&gt;
Tested-by: Primoz Fiser &lt;primoz.fiser@norik.com&gt;
</content>
</entry>
<entry>
<title>board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD</title>
<updated>2024-10-11T17:44:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:47Z</published>
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<id>urn:sha1:dac3ce976a9b06be5aadbd857c4b64a8c521c6d4</id>
<content type='text'>
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge patch series "*** phyCORE-AM62x: DDR detection / Inject DDR timing deltas ***"</title>
<updated>2024-06-07T20:03:36Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-06-07T20:03:36Z</published>
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<id>urn:sha1:0329779bfb911221c056e50710773731619b0310</id>
<content type='text'>
Wadim Egorov &lt;w.egorov@phytec.de&gt; says:

Changes in v2:
  - Reabse to current next
  - Add Tested-by: John Ma &lt;jma@phytec.com&gt;
  - Add Kconfig option to select RAM size statically
  - Make board/phytec/common/k3 always compile for CONFIG_ARCH_K3

v1: https://lists.denx.de/pipermail/u-boot/2024-May/553057.html
</content>
</entry>
<entry>
<title>board: phytec: common: Introduce a method to inject DDR timings deltas</title>
<updated>2024-06-07T20:02:26Z</updated>
<author>
<name>Wadim Egorov</name>
<email>w.egorov@phytec.de</email>
</author>
<published>2024-05-22T07:55:04Z</published>
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<id>urn:sha1:cbf5c99ef317a135ffa9127794d3442a687e4fb8</id>
<content type='text'>
Introduce fdt_apply_ddrss_timings_patch() to allow board code to
override DDR settings in the device tree prior to DDRSS driver probing.

Signed-off-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
Tested-by: John Ma &lt;jma@phytec.com&gt;
</content>
</entry>
<entry>
<title>board: phytec: common: Add API v3</title>
<updated>2024-06-07T20:01:53Z</updated>
<author>
<name>Daniel Schultz</name>
<email>d.schultz@phytec.de</email>
</author>
<published>2024-05-22T06:18:25Z</published>
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<id>urn:sha1:b100c2458a13356e33ddcad0cb14906e41522cea</id>
<content type='text'>
This API is based on a block structure with a 8 Byte large
API v3 header and various of different blocks following. It extends
our current API v2, which is always 32 Byte large, and is located
directly after v2.

Add the MAC block as first block type. It contains the physical
Ehternet interface number, a MAC address and a CRC checksum over the
MAC payload.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
Tested-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"</title>
<updated>2024-05-20T19:35:03Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-20T19:35:03Z</published>
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<id>urn:sha1:03de305ec48b0bb28554372abb40ccd46dbe0bf9</id>
<content type='text'>
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""</title>
<updated>2024-05-19T14:16:36Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-19T02:20:43Z</published>
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<id>urn:sha1:d678a59d2d719da9e807495b4b021501f2836ca5</id>
<content type='text'>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "*** Commonize board code for K3 based SoMs ***"</title>
<updated>2024-05-10T17:33:00Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-10T16:42:25Z</published>
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<id>urn:sha1:f842a7a2c02e400878805a56cef6edfd834c1f9e</id>
<content type='text'>
Wadim Egorov &lt;w.egorov@phytec.de&gt; says:

Factor out code that we can reuse across all our K3 based SoMs.
2nd patch of this series require patch [1] to be applied first.

[1] https://lists.denx.de/pipermail/u-boot/2024-April/552021.html
</content>
</entry>
<entry>
<title>board: phytec: Commonize board code for K3 based SoMs</title>
<updated>2024-05-10T16:42:22Z</updated>
<author>
<name>Wadim Egorov</name>
<email>w.egorov@phytec.de</email>
</author>
<published>2024-04-24T12:53:34Z</published>
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<id>urn:sha1:0b30b28ba3da2f03334cc9b4f06710b6adc7260f</id>
<content type='text'>
Environment handling code can be reused across all our K3 based SoMs.
Instead of adding the same code for every new SoM, move it to a common
board.c file.

Signed-off-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>board: phytec: Add SOM detection for AM6x</title>
<updated>2024-04-29T16:55:58Z</updated>
<author>
<name>Daniel Schultz</name>
<email>d.schultz@phytec.de</email>
</author>
<published>2024-04-19T15:55:40Z</published>
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<id>urn:sha1:9d152c23279c39424b48b4fafa86ec770281af35</id>
<content type='text'>
Add all functions to read each SOM option from the EEPROM
image and detect whether it's the correct product for this
image.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
</content>
</entry>
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