u-boot.git/board/phytec/common/k3/k3_ddrss_patch.c, branch main Unnamed repository; edit this file 'description' to name the repository. http://cgit.235523.xyz/u-boot.git/atom/board/phytec/common/k3/k3_ddrss_patch.c?h=main 2024-07-10T19:36:22Z board: phytec: k3: k3_ddrss_patch: Add ddr phy reg count 2024-07-10T19:36:22Z Dominik Haller d.haller@phytec.de 2024-07-02T09:22:40Z urn:sha1:9945a30e2ed1e1a62585355865755e0e1b744d0a Add and use the correct number of ddr phy registers to update the corresponding settings. Fixes: cbf5c99ef317 ("board: phytec: common: Introduce a method to inject DDR timings deltas") Signed-off-by: Dominik Haller <d.haller@phytec.de> Reviewed-by: Wadim Egorov <w.egorov@phytec.de> board: phytec: common: Introduce a method to inject DDR timings deltas 2024-06-07T20:02:26Z Wadim Egorov w.egorov@phytec.de 2024-05-22T07:55:04Z urn:sha1:cbf5c99ef317a135ffa9127794d3442a687e4fb8 Introduce fdt_apply_ddrss_timings_patch() to allow board code to override DDR settings in the device tree prior to DDRSS driver probing. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Tested-by: John Ma <jma@phytec.com>