u-boot.git/board/phytec/common, branch v2025.01

board: phytec: common: k3: Apply SoM-specific overlays to OS device tree

2024-11-14T16:46:22Z

Our SoMs are available in multiple configurations, managed via device tree overlays. To determine the specific variant in use, we read the EEPROM and apply the appropriate overlays during boot to the device tree used by the OS. Signed-off-by: Wadim Egorov Acked-by: Neha Malcom Francis

board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

2024-10-11T17:44:48Z

Use the new symbol to refer to any 'SPL' build, including TPL and VPL Signed-off-by: Simon Glass

board: phytec: k3: k3_ddrss_patch: Add ddr phy reg count

2024-07-10T19:36:22Z

Add and use the correct number of ddr phy registers to update the corresponding settings. Fixes: cbf5c99ef317 ("board: phytec: common: Introduce a method to inject DDR timings deltas") Signed-off-by: Dominik Haller Reviewed-by: Wadim Egorov

board: phytec: common: k3: Copy fixed partitions to OS device tree

2024-06-18T16:28:59Z

Copy fixed-partitions nodes from U-Boot device tree to OS device tree. Signed-off-by: Wadim Egorov Reviewed-by: Daniel Schultz

Merge patch series "* phyCORE-AM62x: DDR detection / Inject DDR timing deltas *"

2024-06-07T20:03:36Z

Wadim Egorov says: Changes in v2: - Reabse to current next - Add Tested-by: John Ma - Add Kconfig option to select RAM size statically - Make board/phytec/common/k3 always compile for CONFIG_ARCH_K3 v1: https://lists.denx.de/pipermail/u-boot/2024-May/553057.html

board: phytec: am62x: Add support for 1 & 4 GB RAM variants

2024-06-07T20:02:26Z

Use content of EEPROM to detect the actual RAM size and adjust DDR timings, size and banks accordingly. Also enable the SoM detection per default in the defconfigs. Signed-off-by: Wadim Egorov Tested-by: John Ma

board: phytec: common: Introduce a method to inject DDR timings deltas

2024-06-07T20:02:26Z

Introduce fdt_apply_ddrss_timings_patch() to allow board code to override DDR settings in the device tree prior to DDRSS driver probing. Signed-off-by: Wadim Egorov Tested-by: John Ma

board: phytec: Fix function definitions in AM6x SOM detection

2024-06-07T20:02:26Z

Functions are declared as phytec_am6* and not phytec_am62*. Update the definitions to match the declarations. Fixes: 9d152c23279c ("board: phytec: Add SOM detection for AM6x") Signed-off-by: Wadim Egorov Tested-by: John Ma Reviewed-by: Dhruva Gole

board: phytec: Make AM6 SoM detection depend on I2C

2024-06-07T20:02:26Z

SoM detection is using I2C driver model functions. Let's depend on I2C. Signed-off-by: Wadim Egorov Tested-by: John Ma Reviewed-by: Dhruva Gole

board: phytec: common: k3: Set MAC

2024-06-07T20:01:53Z

Read the EEPROM API v3 content and set all available MAC-Addresses to the environment. Signed-off-by: Daniel Schultz Reviewed-by: Wadim Egorov Tested-by: Wadim Egorov

u-boot.git/board/phytec/common, branch v2025.01

board: phytec: common: k3: Apply SoM-specific overlays to OS device tree

board: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD

board: phytec: k3: k3_ddrss_patch: Add ddr phy reg count

board: phytec: common: k3: Copy fixed partitions to OS device tree

Merge patch series "*** phyCORE-AM62x: DDR detection / Inject DDR timing deltas ***"

board: phytec: am62x: Add support for 1 & 4 GB RAM variants

board: phytec: common: Introduce a method to inject DDR timings deltas

board: phytec: Fix function definitions in AM6x SOM detection

board: phytec: Make AM6 SoM detection depend on I2C

board: phytec: common: k3: Set MAC

Merge patch series "* phyCORE-AM62x: DDR detection / Inject DDR timing deltas *"