u-boot.git/board/phytec/phycore_am64x, branch master

board: Correct usage of fdtfile=CONFIG_DEFAULT_FDT_FILE

2026-02-23T21:30:34+00:00

As explained in commit 03d2d5fc003f ("board: sifive: unmatched: set
fdtfile with unquoted variable.") using the syntax of
'fdtfile=CONFIG_DEFAULT_FDT_FILE' in the plain text environment files
will lead to extraneous and problematic "s in the output. This is fixed
by using fdtfile=DEFAULT_FDT_FILE which was introduced recently.

Acked-by: Peng Fan 
Signed-off-by: Tom Rini

board: phytec: Add PHYTEC mailing list to MAINTAINERS entries

2026-01-21T18:05:15+00:00

PHYTEC maintains an actively monitored mailing list for upstream
activities: upstream@lists.phytec.de. Add it to the MAINTAINERS
entries for PHYTEC boards we actively develop and contribute to.

Signed-off-by: Wadim Egorov 
Acked-by: Teresa Remmet

spl: split spl_board_fixups to arch/board specific

2025-10-22T18:05:52+00:00

The current spl_board_fixups API allows for modification of spl_image
before the SPL jumps to it. This can be used to modify the DT for the
next boot stage, however the current API only allows either the machine
arch or the board to use it.

This limits the utility of the API as there might be certain fixups that
should be applied to all boards sharing the same machine architecture
with others being board specific.

For TI's K3 specifically, this prevents us from performing architecture
level fixups since a lot of TI boards are already making use of the
spl_board_fixups API.

Therefore this patch splits the API into two to allow both board and the
architecture specific fixups. The order is kept as arch then board to
give board specific fixups the precedence.

Reviewed-by: Dhruva Gole 
Signed-off-by: Anshul Dalal 
Tested-by: Wadim Egorov

Merge tag 'u-boot-socfpga-next-20250930' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next

2025-09-30T22:11:23+00:00

SoCFPGA updates for v2025.10:

CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762

This pull request brings a set of updates across SoCFPGA platforms
covering Agilex5, Agilex7, N5X, and Stratix10. The changes include:

* Agilex5 enhancements:
  - USB3.1 enablement and DWC3 host driver support
  - System Manager register configuration for USB3
  - Watchdog timeout increase and SDMMC clock API integration
  - dcache handling improvements in SMC mailbox path
  - Enable SPL_SYS_DCACHE_OFF in defconfig

* Clock driver improvements:
  - Introduce dt-bindings header for Agilex clocks
  - Add enable/disable API and EMAC clock selection fixes
  - Replace manual shifts with FIELD_GET usage

* DDR updates:
  - IOSSM mailbox compatibility check
  - Correct DDR calibration status handling

* Device tree changes:
  - Agilex5: disable cache allocation for reads
  - Stratix10: add NAND IP node
  - Enable driver model watchdog
  - Enable USB3.1 node for Agilex5

* Config cleanups:
  - Simplify Agilex7 VAB defconfig
  - Remove obsolete SYS_BOOTM_LEN from N5X VAB config
  - Enable CRC32 support for SoCFPGA
  - Increase USB hub debounce timeout

Overall this set improves reliability of DDR and cache flows,
adds missing USB and MMC features for Agilex5, and refines clock
and configuration handling across platforms.

This patch set has been tested on Agilex 5 devkit, and Agilex devkit.

board: phytec: phycore_am6xx: Update scriptaddr

2025-09-24T13:50:13+00:00

After switching our boards to standard boot, we observed that the
kernel hangs when booting with the "script" boot method over the
network.

The original scriptaddr value was copied from ti_common.env and
remained unused for some time. On phycore-am62x and phycore-am62ax,
however, this address conflicts with the current location where
ATF is loaded (CONFIG_K3_ATF_LOAD_ADDR).

Move scriptaddr to 0x89100000, directly after fdtoverlay_addr_r.
The phycore-am64x is not affected by this issue, but we update it
as well to keep all phycore-am6xx boards consistent.

Signed-off-by: Wadim Egorov 
Reviewed-by: Anshul Dalal

Merge tag 'v2025.10-rc3' into next

2025-08-25T19:28:49+00:00

Prepare v2025.10-rc3

board: phytec: phycore_am6xx: Add rauc to bootmeths

2025-08-25T16:15:16+00:00

Add rauc to bootmeths variable if BOOTMETH_RAUC is enabled.
This is setting a proper default for RAUC enabled systems.

Signed-off-by: Wadim Egorov 
Reviewed-by: Martin Schwan

board: phytec: phycore-am64x: Add watchdog start to bootcmd

2025-08-11T20:53:56+00:00

Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.

Signed-off-by: Wadim Egorov

treewide: Remove empty board_init() function from all boards

2025-07-24T19:30:19+00:00

Commit 86acdce2ba88 ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.

This cleanup was made semi-automatically using these scripts: [1].

No functional change, but the binary size for the modified boards is
reduced a bit.

[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init

Signed-off-by: Sam Protsenko 
Tested-by: Adam Ford  #imx8mm_beacon
Tested-by: Bryan Brattlof 
Acked-by: Peng Fan   #NXP boards

board: phytec: phycore_am6xx: Set bootmeths & boot_targets environment

2025-05-22T19:51:55+00:00

As part of our migration to the standard boot process, configure the
default values for the bootmeths and boot_targets environment variables.

Signed-off-by: Wadim Egorov