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board: phycore_imx8mm: add 1 and 4GB RAM timings

2026-08-03T12:31:05Z

The Phytec Tauri L is sold with multiple memory configurations beyond the base 2 GB variant. To support these alternative capacities seamlessly, read the physical memory size directly from the EEPROM of the underlying phyCORE module and apply the appropriate DDR timing parameters at runtime. Alternatively, a fixed memory configuration can still be enforced via a dedicated Kconfig option if dynamic detection is not desired. Note that while U-Boot correctly discovers the full physical memory bank, the device tree excludes the memory beyond 3 GB (below the 4 GB boundary). This ensures that U-Boot allocations and early EFI staging buffers remain safe from 32-bit interconnect DMA limitations inherent to some i.MX8MM IP blocks. Signed-off-by: INgo Rah Reviewed-by: Gregor Herburger Reviewed-by: Benedikt Spranger Reviewed-by: Yannic Moog Tested-by: Yannic Moog

board: phycore_imx8mm: update RAM timings

2026-08-03T12:31:05Z

Updated RAM timings with new generated settings using DDR Tool v3.6.0_22-aa018543. Provide functions for 1GB, 4GB and revision 7 variants. Signed-off-by: INgo Rah Reviewed-by: Gregor Herburger Reviewed-by: Benedikt Spranger Tested-by: Yannic Moog

board: phytec: phycore_am68x: Turn off pmic watchdog

2026-07-28T18:30:55Z

Starting with pmic firmware version 5 the watchdog is enabled with a timeout window of 13 minutes by default. The TI EVMs use a dip switch to control a gpio on the pmic which gets configured as DISABLE_WDOG by the firmware. On the phycore_am68x there is no such dip switch so pull resistors would be necessary. Using mcu_i2c0 to turn off the pmic watchdog works with all hardware and pmic firmware combinations. Signed-off-by: Dominik Haller

board: phytec: phycore-am62: select tifsstub via FIT config

2026-07-16T18:03:40Z

Use the k3_fit_config_match_security_state() helper introduced in the earlier "arm: k3: select tifsstub via board_fit_config_name_match" patch to pick the right tifsstub variant on phycore AM62x and AM62Ax SoMs at FIT config selection time. The k3-am625-phycore-som-binman.dtsi and k3-am62a-phycore-som-binman.dtsi FIT images are split into per-security-state configurations (conf-hs-se, conf-hs-fs), and board_fit_config_name_match() in each phycore board file forwards to the shared K3 helper. Signed-off-by: Aristo Chen

Kconfig: board: restyle

2026-06-25T20:06:55Z

Restyle all Kconfigs: Menu entries : no space left Menu attributes: 1 TAB Help text : 1 TAB + 2 spaces Signed-off-by: Johan Jonker Reviewed-by: Tom Rini

treewide: move bi_dram[] from bd to gd

2026-06-25T00:13:24Z

Currently, the bi_dram[] information is stored in the board info structure (bd). Because bd is only valid after reserve_board(), dram_init_banksize() must be called late in the initialization process. This limitation is problematic, as it forces us to rely on a variety of bespoke functions to determine board RAM, bank memory sizes, and other early setup requirements. By moving bi_dram[] into the global data (gd), we can run it earlier. This is particularly convenient since boards define their own dram_init_banksize() routines, which do not always rely on parsing Device Tree (DT) memory nodes. Additionally, U-Boot defaults to relocating to the top of the first memory bank. While boards currently use custom functions to override this behavior, having the DRAM bank information available earlier in gd makes relocating to a different bank trivial and standardizes the process. Reviewed-by: Anshul Dalal Tested-by: Michal Simek # Versal Gen 2 Vek385 Tested-by: Anshul Dalal Reviewed-by: Simon Glass Signed-off-by: Ilias Apalodimas Tested-by: Christophe Leroy (CS GROUP)

board: phytec: phycore_am68x: Update rm-cfg

2026-05-29T20:22:38Z

Mirror the j721s2 changes from commit c4fcf9b806ae ("board: ti: j7*: Update rm-cfg and tifs-rm-cfg") to repurpose allocated resources with version V11.02.07 of k3-resource-partition. Signed-off-by: Wadim Egorov Acked-by: Dominik Haller

board: phytec: phycore_am62x: Add tifs-rm-cfg

2026-05-29T20:22:38Z

Add a separate tifs-rm-cfg.yaml so the TIFS bundle uses the trimmed TIFS view instead of reusing rm-cfg.yaml, matching the rest of the AM62 boards. Mirrors commit 964bda9e805d ("board: ti: am62x: tifs-rm-cfg: Add the missing tifs-rm-cfg:") for the phyCORE-AM62x SoM. Signed-off-by: Wadim Egorov

imx8mp: libra-fpsc: Convert to DM_PMIC

2026-04-02T12:11:33Z

Convert the board to use DM_PMIC instead of the legacy SPL I2C/PMIC handling. Changes include: - Enable DM_PMIC, DM_PMIC_PCA9450, and SPL_DM_PMIC_PCA9450 in defconfig. - Drop legacy SPL I2C and PMIC options. - Remove manual I2C1 pad setup and legacy power_pca9450_init() usage. - Use DM-based pmic_get() with the DT node "pmic@25". - Update PMIC register programming to use struct udevice API. Signed-off-by: Peng Fan Reviewed-by: Yannic Moog Tested-by: Yannic Moog Reviewed-by: Teresa Remmet

imx8mp: phyboard-pollux-rdk: Convert to DM_PMIC

2026-04-02T12:11:33Z