u-boot.git/board/phytec, branch v2017.03 Unnamed repository; edit this file 'description' to name the repository. pcm052: fix DDR initialization sequence 2017-02-08T21:24:25+00:00 Albert ARIBAUD \(3ADEV\) albert.aribaud@3adev.fr 2017-02-01T13:46:00+00:00 db74cbfc090f05bbfe31ea05ca7e04bd8f364c9f The sequence erroneously launched the DDR controller initialization before the pad muxing was done, causing DRAM size computation to hang. Configuring the pads first then launching DDR controller initialization prevents the DRAM hanging. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> 
The sequence erroneously launched the DDR controller
initialization before the pad muxing was done, causing
DRAM size computation to hang.

Configuring the pads first then launching DDR controller
initialization prevents the DRAM hanging.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
imx: s/docs\/README.imximage/doc\/README.imximage/g 2016-10-26T14:53:16+00:00 Jagan Teki jagan@amarulasolutions.com 2016-10-08T12:30:14+00:00 03bf9d58b96c56ba0554f3bf908e49ce8ec58053 Fixed typo for doc/README.imximage on respective imximage.cfg files. Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> 
Fixed typo for doc/README.imximage on respective imximage.cfg files.

Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
pcm052: add new BK4r1 target based on PCM052 SoM 2016-10-06T07:22:11+00:00 Albert ARIBAUD \(3ADEV\) albert.aribaud@3adev.fr 2016-09-26T07:08:08+00:00 27192d16eb3dacfedfb507f60a325b482bbf317f Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> 
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
pcm052: allow specifying onboard DDR size in configs 2016-10-06T07:06:16+00:00 Albert ARIBAUD \(3ADEV\) albert.aribaud@3adev.fr 2016-09-26T07:08:07+00:00 a7e5f7f3e5d2458090d8528a5a892a56911a11ce PCM052 SoMs may be equipped with various sizes of DDR. Keep default of 256MB; new PCM052-based targets will specify their actual DDR size. Linux command line is auto-adjusted to DDR size. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> 
PCM052 SoMs may be equipped with various sizes of DDR.
Keep default of 256MB; new PCM052-based targets will
specify their actual DDR size.

Linux command line is auto-adjusted to DDR size.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
pcm052: add 'm4go' command 2016-10-06T07:06:16+00:00 Albert ARIBAUD \(3ADEV\) albert.aribaud@3adev.fr 2016-09-26T07:08:05+00:00 303a24435f3e4b39a6b526ca2a32cd0452713153 Add the 'm4go' command to pcm052-based targets. It loads scatter file images. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> 
Add the 'm4go' command to pcm052-based targets.
It loads scatter file images.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
treewide: replace #include <asm/errno.h> with <linux/errno.h> 2016-09-23T21:55:42+00:00 Masahiro Yamada yamada.masahiro@socionext.com 2016-09-21T02:28:55+00:00 1221ce459d04a428f8880f58581f671b736c3c27 Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> 
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap <asm-generic/errno.h>)

Replace all include directives for <asm/errno.h> with <linux/errno.h>.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
mx6: ddr: Allow changing REFSEL and REFR fields 2016-09-06T16:22:48+00:00 Fabio Estevam fabio.estevam@nxp.com 2016-08-29T23:37:15+00:00 edf0093732225c2fd0791c3864e9a3eef1f92f19 Currently MX6 SPL DDR initialization hardcodes the REF_SEL and REFR fields of the MDREF register as 1 and 7, respectively for DDR3 and 0 and 3 for LPDDR2. Looking at the MDREF initialization done via DCD we see that boards do need to initialize these fields differently: $ git grep 0x021b0020 board/ board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */ board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800 board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800 board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800 So introduce a mechanism for users to be able to configure REFSEL and REFR fields as needed. Keep all the mx6 SPL users in their current REF_SEL and REFR values, so no functional changes for the existing users. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com> 
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
mx6: Add Phytec PCM058 i.MX6 Quad 2016-07-12T15:58:48+00:00 Stefano Babic sbabic@denx.de 2016-06-08T08:50:20+00:00 876a25d289cf9ae6b052ea0dc61b7522e1dec4e1 Add Phytec-i.MX6 SOM with NAND Support: - 1GB RAM - Ethernet - SPI-NOR Flash - NAND (1024 MB) - external SD - UART Signed-off-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> 
Add Phytec-i.MX6 SOM with NAND

  Support:
   - 1GB RAM
   - Ethernet
   - SPI-NOR Flash
   - NAND (1024 MB)
   - external SD
   - UART

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Delete tests of CONFIG_OF_LIBFDT when testing CONFIG_OF_BOARD_SETUP 2016-05-27T19:41:16+00:00 Robert P. J. Day rpjday@crashcourse.ca 2016-05-19T19:23:12+00:00 7ffe3cd62e5af2cda1e18c6d896cab58bfb0c811 Since CONFIG_OF_BOARD_SETUP depends on CONFIG_OF_LIBFDT: config OF_BOARD_SETUP bool "Set up board-specific details in device tree before boot" depends on OF_LIBFDT ... remove superfluous tests of CONFIG_OF_LIBFDT when testing for CONFIG_OF_BOARD_SETUP. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> [trini: Typo fix: s/ifdefi/ifdef/] Signed-off-by: Tom Rini <trini@konsulko.com> 
Since CONFIG_OF_BOARD_SETUP depends on CONFIG_OF_LIBFDT:

  config OF_BOARD_SETUP
          bool "Set up board-specific details in device tree before boot"
          depends on OF_LIBFDT
          ...

remove superfluous tests of CONFIG_OF_LIBFDT when testing for
CONFIG_OF_BOARD_SETUP.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
[trini: Typo fix: s/ifdefi/ifdef/]
Signed-off-by: Tom Rini <trini@konsulko.com>
vf610: add support for Phytec PCM052 2015-10-02T08:42:59+00:00 Albert ARIBAUD \(3ADEV\) albert.aribaud@3adev.fr 2015-09-21T20:43:39+00:00 931a1d2a14191266b675fe9db9afd227e372a919 Devices supported are: - NFC (NAND FLASH) - MMC - QSPI (SPI NOR FLASH) - I2C (only bus 2) - I2C RTC - I2C EEPROM - FEC Patch-series: 2 - remove useless CONFIG_SYS_SPD_BUS_NUM from config - remove include of config_cmd_default.h - remove duplicate CONFIG_CMD_NET Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> 
Devices supported are:
- NFC (NAND FLASH)
- MMC
- QSPI (SPI NOR FLASH)
- I2C (only bus 2)
- I2C RTC
- I2C EEPROM
- FEC

Patch-series: 2
- remove useless CONFIG_SYS_SPD_BUS_NUM from config
- remove include of config_cmd_default.h
- remove duplicate CONFIG_CMD_NET

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>