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<title>u-boot.git/board/phytec, branch v2025.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/phytec?h=v2025.04</id>
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<updated>2025-02-10T16:28:05Z</updated>
<entry>
<title>board: phytec: phycore_am64x: Add support for 1 GB RAM variant and ECC</title>
<updated>2025-02-10T16:28:05Z</updated>
<author>
<name>Wadim Egorov</name>
<email>w.egorov@phytec.de</email>
</author>
<published>2025-02-05T04:30:12Z</published>
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<id>urn:sha1:a4287431ad92c43814dbf25ea9543192f0fc597a</id>
<content type='text'>
Detect RAM size via EEPROM and adjust DDR size and banks accordingly.
Include necessary fixups to handle ECC-enabled configurations.

Signed-off-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
Tested-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
</content>
</entry>
<entry>
<title>board: phytec: common: k3: Expose product infos to Linux</title>
<updated>2025-01-31T17:08:04Z</updated>
<author>
<name>Daniel Schultz</name>
<email>d.schultz@phytec.de</email>
</author>
<published>2025-01-23T14:43:50Z</published>
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<id>urn:sha1:058ed281faed1bac6005d3ebc126fae825309158</id>
<content type='text'>
Call 'phytec_ft_board_fixup' in the common K3 board code
to expose the product name and part number to Linux.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
Reviewed-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>board: phytec: common: Add product information to FTD</title>
<updated>2025-01-31T17:08:04Z</updated>
<author>
<name>Daniel Schultz</name>
<email>d.schultz@phytec.de</email>
</author>
<published>2025-01-23T14:43:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c46b8c4e075fb093642e0fc692c16833647a912'/>
<id>urn:sha1:9c46b8c4e075fb093642e0fc692c16833647a912</id>
<content type='text'>
ft_board_setup inside the board code allows to alter
device-tree during the boot process.

Introduce a new function for the PHYTEC SOM detection
to read the product name and part number from the EEPROM
content and include both into the device-tree as
* phytec,som-part-number
* phytec,som-product-name

This function can be called from the board code when those
values should be exposed to Linux.

This patch also updates the phytec_print_som_info
function and changes the output.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
Reviewed-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
Tested-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>board: phytec: common: k3: Add missing boot source to env</title>
<updated>2025-01-23T18:11:50Z</updated>
<author>
<name>Daniel Schultz</name>
<email>d.schultz@phytec.de</email>
</author>
<published>2025-01-16T11:29:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b2a04cd075c044df22dc1e7a90b7c38d6b3d888f'/>
<id>urn:sha1:b2a04cd075c044df22dc1e7a90b7c38d6b3d888f</id>
<content type='text'>
We set the boot source as environment variable 'boot'.
Also include 'uart' and 'usbdfu' as possible boot sources.

Signed-off-by: Daniel Schultz &lt;d.schultz@phytec.de&gt;
Reviewed-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>board: phytec: phycore-am62x: Add DDR size fixups if ECC is enabled</title>
<updated>2025-01-23T18:11:50Z</updated>
<author>
<name>Wadim Egorov</name>
<email>w.egorov@phytec.de</email>
</author>
<published>2025-01-15T09:41:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=86f3c1cc4750e9de0ee1f44c03219b919f49365a'/>
<id>urn:sha1:86f3c1cc4750e9de0ee1f44c03219b919f49365a</id>
<content type='text'>
With commit 22ce56a3ebdb ("ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc()
to solve 'calculations restricted to 32 bits' issue") we need to provide the
detected RAM size in the device tree node prio to K3 DDRSS driver probe.
This is done by calling fdt_fixup_memory_banks() in do_board_detect().

After probing, call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.

A third fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.

Signed-off-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
</content>
</entry>
<entry>
<title>phycore-imx8mp: Enable CAAM in spl</title>
<updated>2025-01-20T11:41:38Z</updated>
<author>
<name>Leonard Anderweit</name>
<email>l.anderweit@phytec.de</email>
</author>
<published>2025-01-17T13:20:13Z</published>
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<id>urn:sha1:e38a490810af76169f7cf1d298966ea9ba3c005b</id>
<content type='text'>
Enable CAAM in spl.

Signed-off-by: Leonard Anderweit &lt;l.anderweit@phytec.de&gt;
</content>
</entry>
<entry>
<title>doc: phytec: imx8mm: add OP-TEE documentation</title>
<updated>2025-01-16T13:16:02Z</updated>
<author>
<name>Yannic Moog</name>
<email>y.moog@phytec.de</email>
</author>
<published>2025-01-10T12:35:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=99039271c00149322bec3f8fad9128fe4fa93502'/>
<id>urn:sha1:99039271c00149322bec3f8fad9128fe4fa93502</id>
<content type='text'>
Add instructions on how to build and package OP-TEE for the
phycore-imx8mm based boards. The build instructions are identical for
phyGATE-Tauri-L and phyBOARD-Polis.
Also fix missig '-' for TF-A build instructions.

Signed-off-by: Yannic Moog &lt;y.moog@phytec.de&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Add phyCORE AM62Ax"</title>
<updated>2024-12-14T02:09:41Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-12-13T23:30:27Z</published>
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<id>urn:sha1:5360c683e6fe324376c11bfe5064ff1718f78c50</id>
<content type='text'>
Garrett Giordano &lt;ggiordano@phytec.com&gt; says:

This patch set adds the phyCORE AM62Ax board support and documenation to
u-boot.

The phyCORE-AM62Ax is a SoM (System on Module) featuring TI's AM62Ax SoC. It can
be used in combination with different carrier boards. This module can come
with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs
from the AM62x family.

A development Kit, called phyBOARD-Lyra is used as a carrier board reference
design around the AM62x SoM.

This series depends on the following two patches:
- [PATCH v2] arm: mach-k3: am62a7: Provide a way to obtain boot device for non SPL
  https://lists.denx.de/pipermail/u-boot/2024-October/570156.html
- [PATCH] board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
  https://lists.denx.de/pipermail/u-boot/2024-November/571543.html

Link: https://lore.kernel.org/r/20241118231606.3161665-1-ggiordano@phytec.com
[trini: Fix warning in board/phytec/common/k3/board.c when
        CONFIG_EFI_HAVE_CAPSULE_SUPPORT is not enabled]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>board: phytec: am62a7: Add PHYTEC phyCORE-AM62A7 SoM</title>
<updated>2024-12-13T23:30:01Z</updated>
<author>
<name>Garrett Giordano</name>
<email>ggiordano@phytec.com</email>
</author>
<published>2024-11-18T23:16:05Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d13e67c24d167d965b8b733ed7b81712d02518e3'/>
<id>urn:sha1:d13e67c24d167d965b8b733ed7b81712d02518e3</id>
<content type='text'>
Add support for PHYTEC phyCORE-AM62A7 SoM.

Supported features:
  - 2GB LPDDR4 RAM
  - eMMC
  - External SD
  - Ethernet
  - debug UART

Signed-off-by: Garrett Giordano &lt;ggiordano@phytec.com&gt;
Reviewed-by: Wadim Egorov &lt;w.egorov@phytec.de&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Bryan Brattlof &lt;bb@ti.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Enable EFI capsule updates for PHYTEC K3 SoMs"</title>
<updated>2024-12-13T20:15:43Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-12-13T20:15:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7917841b000d5f4732183844b34c4636c206f60e'/>
<id>urn:sha1:7917841b000d5f4732183844b34c4636c206f60e</id>
<content type='text'>
Wadim Egorov &lt;w.egorov@phytec.de&gt; says:

This implements capsule updates for all our K3 SoMs for
eMMC, OSPI NOR and uSD cards.

We can use capsule updates to update the bootloader on all our
supported flash devices.

Link: https://lore.kernel.org/r/20241127121736.1525948-1-w.egorov@phytec.de
</content>
</entry>
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