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<title>u-boot.git/board/pm856, branch v2009.11</title>
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<id>http://cgit.235523.xyz/u-boot.git/atom/board/pm856?h=v2009.11</id>
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<updated>2009-09-24T17:04:58Z</updated>
<entry>
<title>ppc/85xx: Clean up use of LAWAR defines</title>
<updated>2009-09-24T17:04:58Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-09-19T16:20:54Z</published>
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<id>urn:sha1:002741ae862c1c7e3dad89d020e392e6add1c05d</id>
<content type='text'>
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h.  Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>85xx: Move to a common linker script</title>
<updated>2009-08-28T22:12:39Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-08-07T18:00:55Z</published>
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<id>urn:sha1:ec79d33b2c41ee8b6d1354cc0910217b769c5036</id>
<content type='text'>
There are really no differences between all the 85xx linker scripts so
we can just move to a single common one.  Board code is still able to
override the common one if need be.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>85xx: Remove redudant PLATFORM_CPPFLAGS</title>
<updated>2009-08-28T22:12:37Z</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2009-08-06T23:28:34Z</published>
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<id>urn:sha1:53efa1f1acacacb76fa9a21b09b3294783a11c03</id>
<content type='text'>
For historic reasons we had defined some additional PLATFORM_CPPFLAGS
like:

PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1

However these are all captured in the config.h and thus redudant.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>Fix all linker script to handle all rodata sections</title>
<updated>2009-03-20T21:39:12Z</updated>
<author>
<name>Trent Piepho</name>
<email>xyzzy@speakeasy.org</email>
</author>
<published>2009-02-18T23:22:05Z</published>
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<id>urn:sha1:f62fb99941c625605aa16a0097b396a5c16d2c88</id>
<content type='text'>
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho &lt;xyzzy@speakeasy.org&gt;
</content>
</entry>
<entry>
<title>mpc8xxx: LCRR[CLKDIV] is sometimes five bits</title>
<updated>2008-12-20T00:20:25Z</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@freescale.com</email>
</author>
<published>2008-12-03T23:16:34Z</published>
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<id>urn:sha1:a5d212a263c58cc746481bf1fc878510533ce7d6</id>
<content type='text'>
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho &lt;tpiepho@freescale.com&gt;
Acked-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Jon Loeliger &lt;jdl@freescale.com&gt;
</content>
</entry>
<entry>
<title>Align end of bss by 4 bytes</title>
<updated>2008-11-18T22:13:16Z</updated>
<author>
<name>Selvamuthukumar</name>
<email>selva.muthukumar@e-coninfotech.com</email>
</author>
<published>2008-10-16T17:24:03Z</published>
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<id>urn:sha1:9b827cf1720acda2473afa516956eab6f7cca9a1</id>
<content type='text'>
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar &lt;selva.muthukumar@e-coninfotech.com&gt;
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Cleanup: fix "MHz" spelling</title>
<updated>2008-10-21T09:25:39Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-10-19T00:35:50Z</published>
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<id>urn:sha1:8ed44d91c8122d00368523b0b746691c895d3b3c</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>Pass dimm parameters to populate populate controller options</title>
<updated>2008-10-18T19:54:04Z</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2008-10-03T16:36:55Z</published>
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<id>urn:sha1:dfb49108e4f86c2224e1f30124328b0de66ef72e</id>
<content type='text'>
Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.

* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.

Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
</content>
</entry>
<entry>
<title>rename CFG_ macros to CONFIG_SYS</title>
<updated>2008-10-18T19:54:03Z</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-16T13:01:15Z</published>
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<id>urn:sha1:6d0f6bcf337c5261c08fabe12982178c2c489d76</id>
<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
</entry>
<entry>
<title>Moved initialization of EEPRO100 Ethernet controller to board_eth_init()</title>
<updated>2008-09-03T04:18:19Z</updated>
<author>
<name>Ben Warren</name>
<email>biggerbadderben@gmail.com</email>
</author>
<published>2008-09-01T03:37:00Z</published>
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<id>urn:sha1:10efa024b8ffd9e6aaca63da8bddfdffdc672274</id>
<content type='text'>
Affected boards:
	db64360
	db64460
	katmai
	taihu
	taishan
	yucca
	cpc45
	cpu87
	eXalion
	elppc
	debris
	kvme080
	mpc8315erdb
	integratorap
	ixdp425
	oxc
	pm826
	pm828
	pm854
	pm856
	ppmc7xx
	sc3
	sc520_spunk
	sorcery
	tqm8272
	tqm85xx
	utx8245

Removed initialization of the driver from net/eth.c
Also, wrapped contents of pci_eth_init() by CONFIG_PCI.

Signed-off-by: Ben Warren &lt;biggerbadderben@gmail.com&gt;
</content>
</entry>
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