u-boot.git/board/renesas, branch master

board: renesas: gen5-cm33: Convert to common field_{get, prep}() helpers

2026-07-08T19:29:18Z

Drop the driver-specific field_get() and field_prep() macros, in favor of the globally available variants from . Signed-off-by: Mikhail Kshevetskiy

board: renesas: gen5-cm33: #undef field_{get, prep}() before definition

2026-07-08T19:29:18Z

Prepare for the advent of globally available common field_get() and field_prep() macros by undefining the symbols before defining local variants. This prevents redefinition warnings from the C preprocessor when introducing the common macros later. Signed-off-by: Mikhail Kshevetskiy

treewide: move bi_dram[] from bd to gd

2026-06-25T00:13:24Z

Currently, the bi_dram[] information is stored in the board info structure (bd). Because bd is only valid after reserve_board(), dram_init_banksize() must be called late in the initialization process. This limitation is problematic, as it forces us to rely on a variety of bespoke functions to determine board RAM, bank memory sizes, and other early setup requirements. By moving bi_dram[] into the global data (gd), we can run it earlier. This is particularly convenient since boards define their own dram_init_banksize() routines, which do not always rely on parsing Device Tree (DT) memory nodes. Additionally, U-Boot defaults to relocating to the top of the first memory bank. While boards currently use custom functions to override this behavior, having the DRAM bank information available earlier in gd makes relocating to a different bank trivial and standardizes the process. Reviewed-by: Anshul Dalal Tested-by: Michal Simek # Versal Gen 2 Vek385 Tested-by: Anshul Dalal Reviewed-by: Simon Glass Signed-off-by: Ilias Apalodimas Tested-by: Christophe Leroy (CS GROUP)

arm: dts: renesas: Enable DBSC5 on R-Car R8A78000 X5H Cortex-M33 RSIP port

2026-06-16T03:38:25Z

Bind the DBSC5 DRAM controller driver on boot in board_early_init_r(), which brings up the DBSC5 DRAM controller and its PHY and which enables access to DRAM present on this system. Add default boot command which loads additional bootloader components from HF and UFS storage into SRAM and DRAM, and starts those components on SCP and AP core 0. The system is then capable of reaching U-Boot on the AP core 0. Specifically, the following components are loaded: - SCP firmware, 384 kiB from HF offset 0x4c0000 to SCP STCM - TFA BL31, 256 kiB from UFS0 offset 0x5000 * 4 kiB sectors to DRAM 0x8c200000 - TEE, 2 MiB from UFS0 offset 0x5200 * 4 kiB sectors to DRAM 0x8c400000 - U-Boot, 1 MiB from UFS0 offset 0x7200 * 4 kiB sectors to DRAM 0x8c300000 - IPL parameters table is generated at DRAM address 0x8c100000 Enable pstore command support to allow dumping kernel console from pstore/ramoops, which is convenient for debugging. Use as follows: => pstore set 0x80000000 0x10000 0x400 0x8000 0 0 0 => pstore display console Signed-off-by: Marek Vasut

ram: renesas: dbsc5: Add Renesas R-Car Gen5 DBSC5 driver

2026-06-16T03:38:25Z

Add Renesas R-Car Gen5 DBSC5 DRAM controller driver. This driver is currently capable of bringing LPDDR5X DRAM on Renesas R-Car X5H Ironhide board. Further boards can be supported by supplying board specific DRAM configuration data via dbsc5_get_board_data(). The driver reuses parts of previous DBSC5 driver, but due to hardware changes, can not be fully integrated into existing DBSC and DRAM driver, therefore the currentl DBSC and DRAM drivers are moved into R8A779G0 V4H specific files, and the R8A78000 X5H files are added in parallel. The Gen5 DBSC driver is meant to be used in RSIP context, while the Gen4 DBSC driver is meant to be used in SPL, therefore the Kconfig conditionals have been adjusted to match. Signed-off-by: Marek Vasut

arm64: renesas: Fold mach_cpu_init into board_init_f on R-Car S4/V4H/V4M SPL

2026-06-14T02:01:39Z

The mach_cpu_init() function is not invoked in SPL. Instead of having two functions, fold mach_cpu_init() into board_init_f(), which is called very early in the boot process and assures that the CPG and APMU setup will be invoked before DM is brought up. Fixes: 37997a214ed1 ("arm: renesas: Use stock lowlevel_init function and remove s_init") Signed-off-by: Marek Vasut

arm64: dts: renesas: r8a779md: Add support for R-Car M3Le R8A779MD Geist

2026-05-31T22:02:30Z

Add support for the Geist board based on the Renesas R8A779MD (M3Le) SoC, a register-compatible variant of the R8A77965 (M3N) with reduced peripherals. The Geist board design references the Renesas Salvator-X/XS boards, adapting their configuration for the R8A779MD SoC. The board will be switched to OF_UPSTREAM once the DTs land in upstream. Signed-off-by: Huy Bui Signed-off-by: Nguyen Tran Signed-off-by: Marek Vasut

arm: renesas: Add Renesas R-Car R8A78000 X5H Cortex-M33 RSIP port

2026-05-21T19:48:05Z

Add support for building U-Boot for Cortex-M33 RSIP core in Renesas R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the Cortex-M33 RSIP core, which initializes the hardware and then starts the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware and applications software respectively. The SCP is responsible for platform resource management, and is used to start other CPU cores. The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig which configures the build for aarch32 instruction set compatible with the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which are derived from their non-CM33 counterparts, and add CM33 specifics. The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core, those are entrypoint before vectors, __data_start/__data_end symbols for data-only relocation, and placement of BSS into read-write SRAM area. Signed-off-by: Marek Vasut

arm64: renesas: Make R-Car board code 32-bit ARMv8-M compatible

2026-04-08T17:35:05Z

The 64-bit R-Car board code is currently unbuildable on 32-bit ARM cores. Skip DRAM initialization bits to make the code compatible with these cores, because those cores do not use the DRAM, they only use SRAM. Signed-off-by: Marek Vasut

arm: renesas: Use stock lowlevel_init function and remove s_init

2026-04-08T17:35:05Z

Replace s_init() early initialization at the end of lowlevel_init by invoking the same code in mach_cpu_init(). The mach_cpu_init() is called a bit later, but as the code initializes timer and no code uses timer until mach_cpu_init(), this does not pose a problem. Signed-off-by: Marek Vasut