u-boot.git/board/solidrun/clearfog/clearfog.c, branch main

board: solidrun: clearfog: enable ddr odt0 on write for both chip-select

2025-01-28T08:08:44Z

Enabling ODT is required to suppress reflection of the data signal on DDR write operation. SolidRun Armada 388 SoM only connects M_ODT[0] even when both chip-select are used. Enable ODT[0] for both chip-select during write only. Original work by Baruch Siach [1] and Chris Packham [2]. [1] https://github.com/SolidRun/u-boot-armada38x/commit/aba763a611e69fbcc4e229659da9d84f16b39814 [2] https://github.com/SolidRun/u-boot-armada38x/commit/dbaf09590df9add19e738d2de03c0f2d0d8f5433 Signed-off-by: Josua Mayer Reviewed-by: Stefan Roese

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20T19:35:03Z

As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman Signed-off-by: Tom Rini

Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

2024-05-19T14:16:36Z

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman Signed-off-by: Tom Rini

board: solidrun: Remove and add needed includes

2024-05-07T14:00:40Z

Remove from this board vendor directory and when needed add missing include files directly. Signed-off-by: Tom Rini

board: solidrun: clearfog: fix serdes 1 / eth2 speed for clearfog gtr

2024-01-22T11:47:45Z

Clearfog GTR connects eth2 / serdes 1 to a 2.5Gbps capable ethernet switch port. Linux already configures a fixed-link at speed 2500 from device-tree. Upgrade serdes 1 rate to 3.125Gbps to support a 2.5Gbps link. Additionally add comments documenting each serdes' function of clearfog gtr, which are shared with clearfog pro. Signed-off-by: Josua Mayer

arm: mvebu: clearfog gtr: add config option to select serdes0 interface

2024-01-22T11:47:45Z

Clearfog GTR has an assembly option for a SATA connector, CON18. It shares the serdes with mini-pcie connector CON3. Add new kconfig option to select betweenata and pci, defaulting to pci as it was previously configured in board-file. Clearfog GTR connects eth2 / serdes 1 to a 2.5Gbps capable ethernet switch port. Linux already configures a fixed-link at speed 2500 from device-tree. Upgrade serdes 1 rate to 3.125Gbps to support a 2.5Gbps network link on Clearfog GTR. Signed-off-by: Josua Mayer

arm: mvebu: clearfog: support 512MB memory size from tlv eeprom

2023-10-16T12:00:45Z

Handle 2GBit memory size value "2" from tlv eeprom on ddr initialisation, to support SoMs with 512MB ddr memory. Signed-off-by: Josua Mayer Reviewed-by: Stefan Roese

arm: mvebu: clearfog: read number of ddr channels from tlv data

2023-10-16T12:00:45Z

Extend the existing tlv vendor extension used for ram size by one byte to also store the number of ddr channels. The length of the tlv entry can indicate whether the new information is present. If not default to single channel. Signed-off-by: Josua Mayer Reviewed-by: Stefan Roese

arm: mvebu: clearfog: Detect MMC vs SDHC and fixup fdt

2023-03-30T05:05:20Z

[upstream of vendor commit 19a96f7c40a8fc1d0a6546ac2418d966e5840a99] The Clearfog devices have only one SDHC device. This is either eMMC if it is populated on the SOM or SDHC if not. The Linux device tree assumes the SDHC case. Detect if the device is an eMMC and fixup the device-tree so it will be detected by Linux. Ported from vendor repo at https://github.com/SolidRun/u-boot Signed-off-by: Martin Rowe Reviewed-by: Stefan Roese

ARM: mvebu: x530: clearfog: Add ODT configuration

2022-03-04T07:38:05Z

Commit 369e532691e0 ("ddr: marvell: a38x: allow board specific ODT configuration") added the odt_config member to struct mv_ddr_topology_map ahead of the clk_enable and ck_delay members. This means that any boards that configured either of clk_enable or ck_delay needed to have their board topology updated. This affects the x530 and clearfog boards. Other A38x boards don't touch any of the trailing members of mv_ddr_topology_map so don't need updating. Fixes: 369e532691e0 ("ddr: marvell: a38x: allow board specific ODT configuration") Signed-off-by: Chris Packham Acked-by: Baruch Siach Reviewed-by: Stefan Roese