u-boot.git/board/solidrun, branch v2016.07

usb: Rename ehci-fsl.h to ehci-ci.h

2016-04-01T21:18:10+00:00

Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.

This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).

Signed-off-by: Mateusz Kulikowski 
Acked-by: Marek Vasut 
Tested-by: Simon Glass

Use correct spelling of "U-Boot"

2016-02-06T11:00:59+00:00

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng 
Reviewed-by: Heiko Schocher 
Reviewed-by: Simon Glass 
Reviewed-by: Minkyu Kang

arm: mvebu: Consolidate board Kconfig options into one file

2016-01-14T13:08:59+00:00

Merging all the board specific Kconfig options into the main Kconfig file
for mach-mvebu makes things easier to maintain.

Signed-off-by: Stefan Roese 
Cc: Luka Perkov

arm: mvebu: Add SolidRun ClearFog Armada 38x initial support

2016-01-14T13:08:59+00:00

This patch adds basic support for the SolidRun ClearFog Armada 38x based
board to mainline U-Boot. Supported interfaces / devices are:
- DDR3
- UART
- MMC
- Ethernet port 0 (connected to dedicated PHY)
- I2C

The included DT source was taken from Russell King's ftp server:
http://www.home.arm.linux.org.uk/~rmk/clearfog/

With only minor modifications, like the addition of some aliases and the
"u-boot,dm-pre-reloc" property.

Signed-off-by: Stefan Roese 
Cc: Rabeeh Khoury 
Cc: Luka Perkov

MAINTAINERS/mailmap: Update my email address

2016-01-11T16:22:43+00:00

Update my email address to the NXP account.

Signed-off-by: Fabio Estevam

mx6cuboxi: Remove obsolete comment

2016-01-10T09:50:53+00:00

We currently support various versions of Solidrun mx6 boards, so
remove the obsolete comment.

Reported-by: Jon Nettleton 
Signed-off-by: Fabio Estevam 
Reviewed-by: Stefano Babic

mx6cuboxi: Fix the reset delay for the AR8035 PHY

2016-01-10T09:50:24+00:00

Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional:

Booting from net ...
FEC Waiting for PHY auto negotiation to complete......... TIMEOUT !
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4

This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.

As per the AR8035 datasheet:

"For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset
1ms requirement is satisfied."

So do as suggested and keep the reset low for 10ms.

Also add a 100us delay after deasserting the reset line
to guarantee that the PHY ID can be read correctly and the Atheros
PHY can be loaded as per Troy Kisky's suggestion.

Signed-off-by: Fabio Estevam 
Tested-by: Tom Rini

mx6: remove SYS_SOC from board Kconfig

2015-09-13T08:37:29+00:00

Remove duplicated SYS_SOC Kconfig entry from board Kconfig,
because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Heiko Schocher 
Cc: Christian Gmeiner 
Cc: Stefan Roese 
Cc: Troy Kisky 
Cc: Nikita Kiryanov 
Cc: "Eric Bénard" 
Cc: Fabio Estevam 
Cc: Tim Harvey 
Cc: Marek Vasut 
Cc: Markus Niebel 
Cc: Otavio Salvador 
Acked-by: Stefan Roese 
Acked-by: Marek Vasut 
Acked-by: Christian Gmeiner 
Acked-by: Markus Niebel 
Acked-by: Troy Kisky 
Acked-by: Igor Grinberg

imx: mx6: ddr init MMDC according to ddr_type

2015-09-02T13:34:12+00:00

To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use ddr_type to initialize
MMDC for LPDDR2.

Initialize ddr_type for different boards which enable SPL.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Stefan Roese 
Cc: Fabio Estevam 
Reviewed-by: Stefan Roese

imx: clock support enet2 anatop clock support

2015-09-02T13:29:14+00:00

To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
   To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.

Signed-off-by: Peng Fan 
Cc: Heiko Schocher 
Cc: Fabio Estevam 
Cc: Stefan Roese 
Cc: Nikolaos Pasaloukos 
Cc: Stefano Babic 
Reviewed-by: Stefan Roese