u-boot.git/board/solidrun, branch v2016.09

mx6: ddr: Allow changing REFSEL and REFR fields

2016-09-06T16:22:48+00:00

Currently MX6 SPL DDR initialization hardcodes the REF_SEL and
REFR fields of the MDREF register as 1 and 7, respectively for
DDR3 and 0 and 3 for LPDDR2.

Looking at the MDREF initialization done via DCD we see that
boards do need to initialize these fields differently:

$ git grep 0x021b0020 board/
board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800
board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4      0x021b0020 0x00005800
board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800
board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800
board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800
board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800

So introduce a mechanism for users to be able to configure
REFSEL and REFR fields as needed.

Keep all the mx6 SPL users in their current REF_SEL and REFR values,
so no functional changes for the existing users.

Signed-off-by: Fabio Estevam 
Reviewed-by: Eric Nelson

mx6cuboxi: Replace is_mx6q() for macro

2016-07-28T11:27:19+00:00

It's not necessary to implement the is_mx6q function, there is a macro in
sys_proto.h already implemented.

Signed-off-by: Breno Lima 
Reviewed-by: Fabio Estevam

usb: Rename ehci-fsl.h to ehci-ci.h

2016-04-01T21:18:10+00:00

Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.

This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).

Signed-off-by: Mateusz Kulikowski 
Acked-by: Marek Vasut 
Tested-by: Simon Glass

Use correct spelling of "U-Boot"

2016-02-06T11:00:59+00:00

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng 
Reviewed-by: Heiko Schocher 
Reviewed-by: Simon Glass 
Reviewed-by: Minkyu Kang

arm: mvebu: Consolidate board Kconfig options into one file

2016-01-14T13:08:59+00:00

Merging all the board specific Kconfig options into the main Kconfig file
for mach-mvebu makes things easier to maintain.

Signed-off-by: Stefan Roese 
Cc: Luka Perkov

arm: mvebu: Add SolidRun ClearFog Armada 38x initial support

2016-01-14T13:08:59+00:00

This patch adds basic support for the SolidRun ClearFog Armada 38x based
board to mainline U-Boot. Supported interfaces / devices are:
- DDR3
- UART
- MMC
- Ethernet port 0 (connected to dedicated PHY)
- I2C

The included DT source was taken from Russell King's ftp server:
http://www.home.arm.linux.org.uk/~rmk/clearfog/

With only minor modifications, like the addition of some aliases and the
"u-boot,dm-pre-reloc" property.

Signed-off-by: Stefan Roese 
Cc: Rabeeh Khoury 
Cc: Luka Perkov

MAINTAINERS/mailmap: Update my email address

2016-01-11T16:22:43+00:00

Update my email address to the NXP account.

Signed-off-by: Fabio Estevam

mx6cuboxi: Remove obsolete comment

2016-01-10T09:50:53+00:00

We currently support various versions of Solidrun mx6 boards, so
remove the obsolete comment.

Reported-by: Jon Nettleton 
Signed-off-by: Fabio Estevam 
Reviewed-by: Stefano Babic

mx6cuboxi: Fix the reset delay for the AR8035 PHY

2016-01-10T09:50:24+00:00

Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
registered") Ethernet is no longer functional:

Booting from net ...
FEC Waiting for PHY auto negotiation to complete......... TIMEOUT !
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4

This commit does not have an issue in itself, but it revelead a problem
with the Ethernet initialization.

As per the AR8035 datasheet:

"For a reliable power on reset, suggest to keep asserting the reset
low long enough (10ms) to ensure the clock is stable and clock-to-reset
1ms requirement is satisfied."

So do as suggested and keep the reset low for 10ms.

Also add a 100us delay after deasserting the reset line
to guarantee that the PHY ID can be read correctly and the Atheros
PHY can be loaded as per Troy Kisky's suggestion.

Signed-off-by: Fabio Estevam 
Tested-by: Tom Rini

mx6: remove SYS_SOC from board Kconfig

2015-09-13T08:37:29+00:00

Remove duplicated SYS_SOC Kconfig entry from board Kconfig,
because we have this entry in arch/arm/cpu/armv7/mx6/Kconfig.

Signed-off-by: Peng Fan 
Cc: Stefano Babic 
Cc: Heiko Schocher 
Cc: Christian Gmeiner 
Cc: Stefan Roese 
Cc: Troy Kisky 
Cc: Nikita Kiryanov 
Cc: "Eric Bénard" 
Cc: Fabio Estevam 
Cc: Tim Harvey 
Cc: Marek Vasut 
Cc: Markus Niebel 
Cc: Otavio Salvador 
Acked-by: Stefan Roese 
Acked-by: Marek Vasut 
Acked-by: Christian Gmeiner 
Acked-by: Markus Niebel 
Acked-by: Troy Kisky 
Acked-by: Igor Grinberg