<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/board/st, branch v2017.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/st?h=v2017.05</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/board/st?h=v2017.05'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-04-08T13:26:49Z</updated>
<entry>
<title>board: STiH410-B2260: enable caches</title>
<updated>2017-04-08T13:26:49Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2017-03-20T14:21:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4c4da9fbfffcb45b38311a57d3e804c3b0608625'/>
<id>urn:sha1:4c4da9fbfffcb45b38311a57d3e804c3b0608625</id>
<content type='text'>
Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>board_f: Drop setup_dram_config() wrapper</title>
<updated>2017-04-05T20:36:51Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-31T14:40:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=76b00aca4f1c13bc8f91a539e612abc70d0c692f'/>
<id>urn:sha1:76b00aca4f1c13bc8f91a539e612abc70d0c692f</id>
<content type='text'>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM: DT: stm32f7: add qspi pin contol node</title>
<updated>2017-03-17T18:15:16Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-02-12T18:25:53Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e245f1a5db086d676cbd97371046ea5c5e554326'/>
<id>urn:sha1:e245f1a5db086d676cbd97371046ea5c5e554326</id>
<content type='text'>
It also removes the qspi pin configuration done during the
board initialization.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: DT: stm32f7: add ethernet pin contol node</title>
<updated>2017-03-17T18:15:16Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-02-12T18:25:52Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c428a9583349f75f404750253920620207f70d55'/>
<id>urn:sha1:c428a9583349f75f404750253920620207f70d55</id>
<content type='text'>
It also removes the ethernet pin configuration done during the board
initialization.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: DT: stm32f7: add pin control node for serial port pins</title>
<updated>2017-03-17T18:15:15Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-02-12T18:25:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e34e19feb7d06c2c0baf28ed145fe8f63b166fc8'/>
<id>urn:sha1:e34e19feb7d06c2c0baf28ed145fe8f63b166fc8</id>
<content type='text'>
And remove the uart pin configuration from board initialization.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
</entry>
<entry>
<title>stm32f7: clk: remove usart1 clock enable from board init</title>
<updated>2017-03-17T18:15:14Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-02-12T18:25:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b5be8f5ea8d9b0ffc46f818ce0cb38cd16f99e4d'/>
<id>urn:sha1:b5be8f5ea8d9b0ffc46f818ce0cb38cd16f99e4d</id>
<content type='text'>
Before clock driver availability it was required to enable usart1 clock
for serial init but now with clock driver is taking care of usart1 clock.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
</content>
</entry>
<entry>
<title>serial: stm32f7: add device tree support</title>
<updated>2017-03-17T18:15:12Z</updated>
<author>
<name>Vikas Manocha</name>
<email>vikas.manocha@st.com</email>
</author>
<published>2017-02-12T18:25:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=42bf5e7c27ae73b0e56c29f5af3cae5d15d35afa'/>
<id>urn:sha1:42bf5e7c27ae73b0e56c29f5af3cae5d15d35afa</id>
<content type='text'>
This patch adds device tree support for stm32f7 serial driver &amp; removes serial
platform data structure.

Signed-off-by: Vikas Manocha &lt;vikas.manocha@st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board: Add STMicroelectronics STiH410-B2260 support</title>
<updated>2017-03-15T00:40:21Z</updated>
<author>
<name>Patrice Chotard</name>
<email>patrice.chotard@st.com</email>
</author>
<published>2017-02-21T12:37:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5cc16d886ee1ec9841a9ec76365d7b841495c075'/>
<id>urn:sha1:5cc16d886ee1ec9841a9ec76365d7b841495c075</id>
<content type='text'>
This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
    with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>ARM: SPI: stm32: add stm32f746 qspi driver</title>
<updated>2017-01-28T19:04:50Z</updated>
<author>
<name>Michael Kurz</name>
<email>michi.kurz@gmail.com</email>
</author>
<published>2017-01-22T15:04:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d4363baada1505e126fc75c292f17903ab9c9e3a'/>
<id>urn:sha1:d4363baada1505e126fc75c292f17903ab9c9e3a</id>
<content type='text'>
This patch adds support for the QSPI IP found in stm32f7 devices.

Signed-off-by: Michael Kurz &lt;michi.kurz@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: stm32: add designware mac glue code for stm32</title>
<updated>2017-01-28T19:04:47Z</updated>
<author>
<name>Michael Kurz</name>
<email>michi.kurz@gmail.com</email>
</author>
<published>2017-01-22T15:04:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b20b70fcc027a173b61950e9bb4a736557d19697'/>
<id>urn:sha1:b20b70fcc027a173b61950e9bb4a736557d19697</id>
<content type='text'>
This patch adds glue code required for enabling the designware
mac on stm32f7 devices.

Signed-off-by: Michael Kurz &lt;michi.kurz@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
</feed>
