u-boot.git/board/stxssa, branch master

stx: create common vendor/board hierarchy for STx boards

2009-08-28T22:12:38Z

Move files belonging to the STx boards into common vendor directory and update the Makefile to reflect this. Signed-off-by: Alex Dubov Signed-off-by: Kumar Gala

85xx: Remove redudant PLATFORM_CPPFLAGS

2009-08-28T22:12:37Z

For historic reasons we had defined some additional PLATFORM_CPPFLAGS like: PLATFORM_CPPFLAGS += -DCONFIG_E500=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1 However these are all captured in the config.h and thus redudant. Signed-off-by: Kumar Gala

Fix all linker script to handle all rodata sections

2009-03-20T21:39:12Z

A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho

fsl-ddr: use the 1T timing as default configuration

2009-01-23T23:03:14Z

For light loaded system, we use the 1T timing to gain better memory performance, but for some heavily loaded system, you have to add the 2T timing options to board files. Signed-off-by: Dave Liu Acked-by: Andy Fleming

Align end of bss by 4 bytes

2008-11-18T22:13:16Z

Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar Signed-off-by: Wolfgang Denk

Pass dimm parameters to populate populate controller options

2008-10-18T19:54:04Z

Because some dimm parameters like n_ranks needs to be used with the board frequency to choose the board parameters like clk_adjust etc. in the board_specific_paramesters table of the board ddr file, we need to pass the dimm parameters to the board file. * move ddr dimm parameters header file from /cpu to /include directory. * add ddr dimm parameters to populate board specific options. * Fix fsl_ddr_board_options() for all the 8xxx boards which call this function. Signed-off-by: Haiying Wang

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03Z

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

Coding style cleanup, update CHANGELOG

2008-09-13T00:23:05Z

Signed-off-by: Wolfgang Denk

Moved initialization of TULIP Ethernet controller to board_eth_init()

2008-09-03T04:18:18Z

Affected boards: cu824 bab7xx adciop dasa_sim mousse mpc8540eval musenki mvblue pcippc2/pcippc6 sbc8240 stxssa Removed initialization of the driver from net/eth.c Signed-off-by: Ben Warren

FSL DDR: Convert STXSSA to new DDR code.

2008-08-27T16:43:53Z

Signed-off-by: Kumar Gala