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<title>u-boot.git/board/xilinx/microblaze-generic/Kconfig, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2024-02-27T19:18:54Z</updated>
<entry>
<title>Kconfig: Centralize prompting for SYS_CONFIG_NAME</title>
<updated>2024-02-27T19:18:54Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-01-22T22:39:20Z</published>
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<id>urn:sha1:3dd1486800d3aa0cff114a34d7dc1cdc3f47c172</id>
<content type='text'>
Generally speaking, we do not prompt for this value and define it in the
board specific Kconfig file. There are some valid use cases however
today where we do prompt for this value, so instead of having this be
done in a number of locations, do this at the top-level location only.

This removes the question from a number of other locations and makes it
consistent that when we do set the value directly, we always do it the
same way. We don't need to specify the type, it's always string.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>microblaze: add support for handling PVR data</title>
<updated>2022-06-24T12:16:00Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovpanait@gmail.com</email>
</author>
<published>2022-05-31T18:14:34Z</published>
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<id>urn:sha1:9df16c5937f68654fb2b67f932319c375f8e4e45</id>
<content type='text'>
Add helper code for PVR (Processor Version Register) data handling. It
will be used by the UCLASS_CPU driver to populate cpuinfo fields at
runtime.

Signed-off-by: Ovidiu Panait &lt;ovpanait@gmail.com&gt;
Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option</title>
<updated>2022-06-24T12:16:00Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovpanait@gmail.com</email>
</author>
<published>2022-05-31T18:14:33Z</published>
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<id>urn:sha1:064057fdbee085dba17f7afc298deb9ffbf3382a</id>
<content type='text'>
Provide a static Kconfig value for the target FPGA archtitecture, as it is
done in Linux. The cpu-uclass driver will cross-check it with the value
read from PVR10 register.

Signed-off-by: Ovidiu Panait &lt;ovpanait@gmail.com&gt;
Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>microblaze: cache: introduce Kconfig options for icache/dcache sizes</title>
<updated>2022-06-24T12:16:00Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovpanait@gmail.com</email>
</author>
<published>2022-05-31T18:14:29Z</published>
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<id>urn:sha1:84488fc69348367ee693ea4ab6affe3cbcae97a0</id>
<content type='text'>
Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for
instruction and data caches sizes, respectively:
CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE
CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE

Also, get rid of the hardcoded value in icache_disable().

Signed-off-by: Ovidiu Panait &lt;ovpanait@gmail.com&gt;
Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt; (s/bralid/brlid/g)
</content>
</entry>
<entry>
<title>microblaze: cache: improve icache Kconfig options</title>
<updated>2022-06-24T12:16:00Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovpanait@gmail.com</email>
</author>
<published>2022-05-31T18:14:27Z</published>
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<id>urn:sha1:8daf89678e9a8ce4203d2df6c65d9ff17aad785a</id>
<content type='text'>
Replace CONFIG_ICACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports
the "wic" (Write to Instruction Cache) instruction. It will be used to
guard "wic" invocations in microblaze cache code.

Signed-off-by: Ovidiu Panait &lt;ovpanait@gmail.com&gt;
Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>microblaze: cache: improve dcache Kconfig options</title>
<updated>2022-06-24T12:16:00Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovpanait@gmail.com</email>
</author>
<published>2022-05-31T18:14:26Z</published>
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<id>urn:sha1:ef0a592ae8e2961519510f48ffe48b655b31610a</id>
<content type='text'>
Replace CONFIG_DCACHE with a Kconfig option more limited in scope -
XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports
the "wdc" (Write to Data Cache) instruction. It will be used to guard
"wdc" invocations in microblaze cache code.

Also, drop all ifdefs around flush_cache() calls and only keep one
CONFIG_IS_ENABLED() guard within flush_cache() itself.

Signed-off-by: Ovidiu Panait &lt;ovpanait@gmail.com&gt;
Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>microblaze: exception: migrate MICROBLAZE_V5 to Kconfig</title>
<updated>2022-02-15T12:11:43Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait@windriver.com</email>
</author>
<published>2022-02-13T08:09:20Z</published>
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<id>urn:sha1:1669b3d1a0b56178ec8123c48fbf6dabe46b23a4</id>
<content type='text'>
Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only
covers delay slot exception support.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait@windriver.com&gt;
Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: add Kconfig symbol for the vector base address</title>
<updated>2022-01-05T09:22:03Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait@windriver.com</email>
</author>
<published>2021-11-30T16:33:55Z</published>
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<id>urn:sha1:b6aef109799614f1efa921bdb8a73e461d9bcbdd</id>
<content type='text'>
MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS
configuration parameter). Current code assumes that the reset vector
location is always 0x0.

Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user
can adjust the reset vector address.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait@windriver.com&gt;
Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig</title>
<updated>2022-01-05T09:22:03Z</updated>
<author>
<name>Ovidiu Panait</name>
<email>ovidiu.panait@windriver.com</email>
</author>
<published>2021-11-30T16:33:54Z</published>
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<id>urn:sha1:83b175be16893c25509f6d2959f1b457101fbcf9</id>
<content type='text'>
Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to
XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of
microblaze-generic Kconfig options.

Signed-off-by: Ovidiu Panait &lt;ovidiu.panait@windriver.com&gt;
Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Add missing quotes around XILINX_MICROBLAZE0_HW_VER</title>
<updated>2018-08-06T06:44:35Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-07-23T06:34:43Z</published>
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<id>urn:sha1:8a32077ea61fb0f300cc507876326f336b8b3bef</id>
<content type='text'>
This issue is reported by kconfiglib:
warning: style: quotes recommended around default value for string
symbol XILINX_MICROBLAZE0_HW_VER (defined at
board/xilinx/microblaze-generic/Kconfig:37)

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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