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<title>u-boot.git/board/xilinx, branch v2013.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/xilinx?h=v2013.07</id>
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<updated>2013-05-30T12:45:06Z</updated>
<entry>
<title>Merge branch 'u-boot/master' into 'u-boot-arm/master'</title>
<updated>2013-05-30T12:45:06Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-05-30T12:45:06Z</published>
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<id>urn:sha1:a19b0dd62d7b8efc658fa1aa685ff5665878f3ee</id>
<content type='text'>
Conflicts:
	common/cmd_fpga.c
	drivers/usb/host/ohci-at91.c
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'</title>
<updated>2013-05-10T22:06:03Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-05-10T22:06:03Z</published>
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<id>urn:sha1:e825b100d209a9d3c79b2998452cafa94eec986a</id>
<content type='text'>
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</entry>
<entry>
<title>gpio: Add support for microblaze xilinx GPIO</title>
<updated>2013-05-09T09:20:08Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2013-04-24T08:01:20Z</published>
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<id>urn:sha1:4e779ad2e54e39d5343c8c83b4fc686a7bb16859</id>
<content type='text'>
Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.

Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.

There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.

Adding several gpios IP is also possible and supported.

For listing gpio configuration please use "gpio status" command

This patch also remove one compilation warning:
microblaze-generic.c: In function 'do_reset':
microblaze-generic.c:38:47: warning: operation on '*1073741824u'
 may be undefined [-Wsequence-point]

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>fpga: zynq: Add support for loading bitstream</title>
<updated>2013-05-06T08:41:24Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2013-04-22T13:43:02Z</published>
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<id>urn:sha1:d5dae85f23c7c902731512e451afde9a6e4a250a</id>
<content type='text'>
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.

The first driver version was done by:
Joe Hershberger &lt;joe.hershberger@ni.com&gt;

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>mmc: Add support for Xilinx Zynq sdhci controller</title>
<updated>2013-04-30T09:39:27Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2013-04-22T12:56:49Z</published>
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<id>urn:sha1:293eb33fcb95e2b2bae71edf97b0ca3bdd6ba98d</id>
<content type='text'>
Add support for SD, MMC and eMMC card on Xilinx Zynq.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>net: gem: Preserve clk on emio interface</title>
<updated>2013-04-30T09:39:24Z</updated>
<author>
<name>David Andrey</name>
<email>david.andrey@netmodule.com</email>
</author>
<published>2013-04-05T15:24:24Z</published>
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<id>urn:sha1:01fbf31042e1eba1fcca3e84f70db7de0d176fe4</id>
<content type='text'>
Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL
if the Ethernet interface is connect on EMIO

Do not enable emio for this standard board configuration for now.

Signed-off-by: David Andrey &lt;david.andrey@netmodule.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>net: gem: Pass phy address to init</title>
<updated>2013-04-30T09:39:23Z</updated>
<author>
<name>David Andrey</name>
<email>david.andrey@netmodule.com</email>
</author>
<published>2013-04-04T17:13:07Z</published>
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<id>urn:sha1:117cd4cc103443b442afc4d48c8d3920f6c171c0</id>
<content type='text'>
Pass the PHY address to the driver init to
allow parallel use of both interfaces

Signed-off-by: David Andrey &lt;david.andrey@netmodule.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>zynq: Move macros to hardware.h</title>
<updated>2013-04-30T09:39:21Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2013-04-12T14:33:08Z</published>
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<id>urn:sha1:7193653e8dddf8f232c19e16a4ca3c5052c71f09</id>
<content type='text'>
Add all fixed addresses to hardware.h and change petalinux
configuration to support this.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>watchdog: Add support for Xilinx Microblaze watchdog</title>
<updated>2013-04-30T09:22:43Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2013-04-22T09:23:16Z</published>
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<id>urn:sha1:0f21f98dd4d6bff72df4eeaca4163779896cb336</id>
<content type='text'>
Watchdog can be used on Microblaze, PPC and Zynq hw designs.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Disable all cpu features before reset</title>
<updated>2013-04-30T09:22:42Z</updated>
<author>
<name>Michal Simek</name>
<email>monstr@monstr.eu</email>
</author>
<published>2012-11-07T14:27:39Z</published>
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<id>urn:sha1:8848668e136cccb30229b5e1484d41e0b5a6830a</id>
<content type='text'>
Fix microblaze soft reset function and disable
all cpu features. Especially disable caches because
IRQs were off by disable_interrupts().

Reported-by: John Williams &lt;john.williams@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;monstr@monstr.eu&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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