u-boot.git/board/xilinx, branch v2018.01Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/board/xilinx?h=v2018.012017-12-18T08:32:07Zarm64: zynqmp: Access timestamp_ref_ctrl register only if running in el32017-12-18T08:32:07ZSiva Durga Prasad Paladugusiva.durga.paladugu@xilinx.com2017-12-07T09:35:30Zurn:sha1:ec60a279ec6138d9d9f8e73b12625e0052ec4793
Access the timestamp ref ctrl register only if runinng
at el3 level otherwise just return. This change fixes
the issue when CRL APB is marked as secure and accessing
when not in el3 causes exception.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Add support for zynqmp automotive silicons2017-12-14T19:08:45ZMichal Simekmichal.simek@xilinx.com2017-12-06T07:33:50Zurn:sha1:0fc9d84872a2062a9d27debcf6e5fce6d4c959d4
Remove silicon prefix. Automotive grade devices are using xazu instead
of xczu prefix.
The patch "fpga: xilinx: Check for substring in device ID validation"
(sha1: f72132673a01216e760864e442f168977cce2bd2)
enables this functionality for zynq devices that only substrings are
checked.
Unfortunately there is no way how to detect device grade that's why
this change is reasonable.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Setup modeboot variable based on bootmode2017-12-14T19:08:22ZMichal Simekmichal.simek@xilinx.com2017-12-01T14:18:24Zurn:sha1:07656ba5f76e6d351b66b8ee933a7547cf39d41c
Setup bootmode variable based on bootmode selection.
This is helping with setting up boot method.
Also setup sdbootdevice.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Read boot mode register using zynqmp_mmio_read2017-12-14T19:08:22ZSiva Durga Prasad Paladugusiva.durga.paladugu@xilinx.com2017-02-21T12:28:28Zurn:sha1:d1db89f47d4fa4462d9d00fa6cbec322193a748d
Dont read boot mode register directly read it using
zynqmp_mmio_read().
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm: zynq: Add ps7_init for cc1082017-11-29T07:02:40ZMichal Simekmichal.simek@xilinx.com2017-11-10T11:41:10Zurn:sha1:40df796133399d463b8a736deb5227a05c81caea
After some generic cleanup adding ps7_init* to repository
is not big pain now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm: zynq: Show information about silicon version2017-11-29T07:02:40ZMichal Simekmichal.simek@xilinx.com2017-11-10T12:01:10Zurn:sha1:29fb5703781dd60cd664989d6fe62da59cf42820
Show information about silicon in bootlog.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm: zynq: Convert all board to use arch ps7_init code2017-11-29T07:02:39ZMichal Simekmichal.simek@xilinx.com2017-11-10T10:00:42Zurn:sha1:460b05d96db50ec0578fb7bc3598e316df0ff3de
Use generic implementation. It will also reduce config data size for
converted boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm: zynq: Remove ps7_debug code2017-11-29T07:02:39ZMichal Simekmichal.simek@xilinx.com2017-11-10T08:09:48Zurn:sha1:a3b36c8424c529a3a1a5cf6eb9da6e30ae16360b
SPL is not calling this code that's why it is dead code and can be
removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Add new ID for RFSoC2017-11-28T15:09:01ZMichal Simekmichal.simek@xilinx.com2017-06-02T06:08:59Zurn:sha1:b030fedf63d9e356ffd1b00a6638153655a96ab7
This ID is available on zc1254.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: Add support for CG/EG/EV device detection2017-11-28T15:09:01ZMichal Simekmichal.simek@xilinx.com2017-08-22T12:58:53Zurn:sha1:494fffe70d6ebb4e4bffa4dc0a55df6b2b9a58d9
Version string has unused fields 31:20 which can be used for exporting 9
bits from efuse IPDISABLE regs to recognize eg/cg/ev devices.
These efuse bits are setup for certain devices.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>