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<title>u-boot.git/board/xilinx, branch v2018.05</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/xilinx?h=v2018.05</id>
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<updated>2018-05-07T13:34:12Z</updated>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06Z</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: zynq: Wire automatic ddr detection for Zynq and ZynqMP case</title>
<updated>2018-04-23T11:15:32Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-04-11T14:12:28Z</published>
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<id>urn:sha1:61dc92a29d3028296dc3ff34641c78c402e8c14a</id>
<content type='text'>
When static memory configuration is used U-Boot has capability to detect
memory size in setup range. Enable this feature for static
configuration.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add support for Xilinx zcu106-revA</title>
<updated>2018-04-09T10:14:52Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-28T13:43:51Z</published>
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<id>urn:sha1:cf0bcd7d02e9f1774a3a6643ec4739c8c0aef217</id>
<content type='text'>
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add support for zcu104 customer board</title>
<updated>2018-04-09T10:14:52Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-28T13:36:36Z</published>
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<id>urn:sha1:f7c8e491e9a493239471cb4eb77fc940c526bcf3</id>
<content type='text'>
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with
some differences.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add support for zc12xx boards</title>
<updated>2018-04-09T10:14:52Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-28T13:09:32Z</published>
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<id>urn:sha1:85231c087eff5968e37966d6cc751f954301c43d</id>
<content type='text'>
Add support for zc12xx boards. All of them are internal boards for
silicon validation and share very similar base platforms.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add support for zc1751 dc3</title>
<updated>2018-04-09T10:14:52Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-28T13:00:25Z</published>
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<id>urn:sha1:10aaa3584bc4381f86253acc136d641c7dce64eb</id>
<content type='text'>
zc1751 is based board with dc3 extenstion card which is used for silicon
validation.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add support for zcu100 aka Ultra96 board</title>
<updated>2018-04-09T10:14:52Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-28T12:37:47Z</published>
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<id>urn:sha1:6d0340931ec3d833a3c9525014d78424fba644a4</id>
<content type='text'>
Add support for Xilinx zcu100.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add low level initialization for zc1751</title>
<updated>2018-04-09T10:14:51Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-28T12:49:43Z</published>
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<id>urn:sha1:8314bfe5c71814be6ff798e4d22eeedab9fc43a5</id>
<content type='text'>
Add psu init for zc1751 dc cards.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add low level initialization for zcu102-revA</title>
<updated>2018-04-09T10:14:51Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-28T12:47:16Z</published>
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<id>urn:sha1:979707baa9b9217e5d0d5a6d0fb29bdef3afabc4</id>
<content type='text'>
Add psu init for zcu102-revA.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragments</title>
<updated>2018-03-23T08:36:15Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-03-13T10:07:25Z</published>
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<id>urn:sha1:8ae3d0b50cd22aebcd87022dc357d1cf0f3a879b</id>
<content type='text'>
Fix my fragments to list all files in the repo.

Also fix path to for Xilinx Zynq SoC (mach-zynq)
It should be the part of
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc)

And cover dts files in board MAINTAINERS files.

Reported-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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