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<title>u-boot.git/board/xilinx, branch v2018.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/xilinx?h=v2018.09</id>
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<updated>2018-08-07T15:36:39Z</updated>
<entry>
<title>zynqmp: Add avnet_ultra96_rev1_defconfig to the lits of boards</title>
<updated>2018-08-07T15:36:39Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-08-07T15:36:39Z</published>
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<id>urn:sha1:b1aad8dbe28415695b290726199681ced969c118</id>
<content type='text'>
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm64: zynqmp: Add support for Avnet Ultra96</title>
<updated>2018-08-06T06:44:35Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-07-24T14:27:00Z</published>
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<id>urn:sha1:2570e12960486cdf2b1e0e3fb8f6100116ccf65e</id>
<content type='text'>
Avnet Ultra96 is rebranded Xilinx zcu100 revC/D. Add new defconfig files
and point to origin internal board name.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>arm: zynq: add support for the zybo z7 board</title>
<updated>2018-08-06T06:44:35Z</updated>
<author>
<name>Luis Araneda</name>
<email>luaraneda@gmail.com</email>
</author>
<published>2018-07-24T15:31:19Z</published>
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<id>urn:sha1:58f449676ac29938ea2970e240a2defe99240a8e</id>
<content type='text'>
The board is manufactured by Digilent
Main features:
- Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
- RAM: 1 GB DDR3L
- FLASH: 16 MB QSPI
- 1 Gbps Ethernet
- USB 2.0
- microSD slot
- Pcam camera connector
- HDMI Tx and Rx
- Audio codec: stereo out, stereo in, mic
- 5 (Z7-10) or 6 (Z7-20) Pmod ports
- 6 push-buttons, 4 switches, 5 LEDs
- 1 (Z7-10) or 2 (Z7-20) RGB LEDs

Signed-off-by: Luis Araneda &lt;luaraneda@gmail.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Add missing quotes around XILINX_MICROBLAZE0_HW_VER</title>
<updated>2018-08-06T06:44:35Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-07-23T06:34:43Z</published>
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<id>urn:sha1:8a32077ea61fb0f300cc507876326f336b8b3bef</id>
<content type='text'>
This issue is reported by kconfiglib:
warning: style: quotes recommended around default value for string
symbol XILINX_MICROBLAZE0_HW_VER (defined at
board/xilinx/microblaze-generic/Kconfig:37)

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>lib: fdtdec: Rename routine fdtdec_setup_memory_size()</title>
<updated>2018-07-19T08:49:56Z</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2018-07-16T10:26:11Z</published>
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<id>urn:sha1:12308b128fa28d50c1586f60f3117f5213356756</id>
<content type='text'>
This patch renames the routine fdtdec_setup_memory_size()
to fdtdec_setup_mem_size_base() as it now fills the
mem base as well along with size.

Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;

</content>
</entry>
<entry>
<title>arm64: zynqmp: Added support of mmio read and write commands</title>
<updated>2018-07-19T08:49:56Z</updated>
<author>
<name>Vipul Kumar</name>
<email>vipul.kumar@xilinx.com</email>
</author>
<published>2018-07-16T12:34:22Z</published>
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<id>urn:sha1:0358cee5959fca0fea1074d038359d9d15a5a11e</id>
<content type='text'>
This patch added support of mmio read and write commands. These commands
can be used to read and write registers from the u-boot command line.
It can be useful in debugging.

Signed-off-by: Vipul Kumar &lt;vipul.kumar@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Convert generic platform to DM gpio</title>
<updated>2018-07-19T08:49:55Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2018-07-13T06:26:28Z</published>
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<id>urn:sha1:4a693669670fffd9a614c8c5c9f5ba027fd0185e</id>
<content type='text'>
Converting GPIO to DM requires to do changes in reset subsystem
that's why support for Microblaze soft reset via sysreset and GPIO
sysreset support was added.
These two patches enables enabling GPIO DM.
Microblaze soft reset is bind at last reset method.

GPIO reset is handled via sysreset with adding this fragment to DT.

gpio-restart {
	compatible = "gpio-restart";
	gpios = &lt;&amp;reset_gpio 0 0 0&gt;;
	/* 3rd cell ACTIVE_HIGH = 0, ACTIVE_LOW = 1 */
};

hard-reset-gpio property is not documented and also handled.
Conversion is required.

Unfortunately do_reset is required for SPL that's why use only soft
microblaze reset for now.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Support for watchdog_reset in init</title>
<updated>2018-07-19T08:49:55Z</updated>
<author>
<name>Shreenidhi Shedi</name>
<email>yesshedi@gmail.com</email>
</author>
<published>2018-07-14T20:35:40Z</published>
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<id>urn:sha1:6ec6f5841d7ee9f4f398f5c617a50a14f2f446ef</id>
<content type='text'>
We should support watchdog reset so that WATCHDOG_RESET will function
properly.

Signed-off-by: Shreenidhi Shedi &lt;yesshedi@gmail.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Delete Xilinx watchdog related macros</title>
<updated>2018-07-19T08:49:55Z</updated>
<author>
<name>Shreenidhi Shedi</name>
<email>yesshedi@gmail.com</email>
</author>
<published>2018-07-14T20:35:39Z</published>
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<id>urn:sha1:88811bb5a11b1d29196694fdcfa26a4e6ebd87d4</id>
<content type='text'>
These macros are not required anymore. These will be taken from
configuration file.

Signed-off-by: Shreenidhi Shedi &lt;yesshedi@gmail.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>microblaze: Cosmetic changes in Microblaze related files</title>
<updated>2018-07-19T08:49:55Z</updated>
<author>
<name>Shreenidhi Shedi</name>
<email>yesshedi@gmail.com</email>
</author>
<published>2018-07-14T21:04:35Z</published>
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<id>urn:sha1:35912528a86ad15dd6931d03ec4ac275e24581a2</id>
<content type='text'>
Signed-off-by: Shreenidhi Shedi &lt;yesshedi@gmail.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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