u-boot.git/board, branch main

fix non-existing sysam.it domain

2026-08-28T18:18:11Z

Change "Angelo Dureghello" emails replacing non-existing domain with the currently working one. Signed-off-by: Angelo Dureghello Acked-by: Michal Simek

remoteproc: renesas: rsip: Extract SCP initialization from board file

2026-08-14T22:55:43Z

Move the SCP initialization from board file into remoteproc driver where this is supposed to be. Add SCP MDLC DT node and describe the SCP reset controlled by the SCP MDLC in remoteproc DT node. Adjust the driver to control the SCP reset via reset framework instead of the current board-specific register poking. Signed-off-by: Marek Vasut

board: xilinx: Generate FWU capsule dfu_alt_info from fwu_platform_hook()

2026-08-12T04:54:37Z

Commit 371a6c1744f3 ("board: xilinx: Add capsule and FWU support") and commit 818c06faa119 ("board: amd: Add capsule and FWU support") introduced a separate set_dfu_alt_info() for the FWU multi-bank case (Versal and Versal Gen 2 respectively) which set the dfu_alt_info environment variable directly, while configure_capsule_updates() handled the non-FWU case by filling update_info.dfu_string. Fold the FWU multi-bank generation (fwu_gen_alt_info_from_mtd() over the nor0 MTD partitions) into fwu_platform_hook() and drop the standalone set_dfu_alt_info(). Signed-off-by: Michal Simek Link: https://patch.msgid.link/33c118b8177f8d0dc182a6f4c5cffedca4e02448.1782986903.git.michal.simek@amd.com

Merge tag 'u-boot-imx-main-20260807' of https://git.u-boot-project.org/u-boot/custodians/u-boot-imx

2026-08-07T16:21:33Z

CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-imx/-/pipelines/906 - Fix a boot regression on i.MX7 related to the system counter. - Add Aquila iMX95 0243 PID4. - Update phycore_imx8mm DDR timings. - Add FRDM-IMX95 initial support. - Handle FCFB header during SPI NOR boot and CST backend selection.

imx: Add FRDM-IMX95 initial support

2026-08-06T11:50:59Z

Add boot support and peripherals like eMMC/SD, UART, I2C, GPIO, ENETC0/1 and PCIE0/1 for iMX95 15x15 FRDM. Updated doc for build instructions. Signed-off-by: Lei Xu Signed-off-by: Joseph Guo

board: sophgo: add support for Milk-V Duo 256M

2026-08-05T18:13:19Z

Add U-Boot support for Milk-V Duo 256M. This board has a different SoC compared to the Milk-V Duo 64M, it uses the Sophgo SG2002 instead of the Sophgo CV1800B. Both SoCs share many common IP blocks, so this board reuses the existing cv1800b CPU support. The board shares the same 'board.c' with Milk-V Duo 64MB (CV1800B), so use the same file for now. Link: https://milkv.io/docs/duo/getting-started/duo256m Signed-off-by: Hiago De Franco Acked-by: Leo Yu-Chi Liang

board: sophgo: move ethernet driver to common directory

2026-08-05T17:16:08Z

This will make easier for future boards to reuse the same driver (e.g. Milk-V Duo 256MB). Signed-off-by: Hiago De Franco Acked-by: Leo Yu-Chi Liang

toradex: tdx-cfg-block: Add Aquila iMX95 0243 PID4

2026-08-03T12:32:42Z

Add the new 0243 PID4 to config block handling: - 0243 Aquila iMX95 Hexa 8GB IT Signed-off-by: Franz Schnyder

board: phycore_imx8mm: add 1 and 4GB RAM timings

2026-08-03T12:31:05Z

The Phytec Tauri L is sold with multiple memory configurations beyond the base 2 GB variant. To support these alternative capacities seamlessly, read the physical memory size directly from the EEPROM of the underlying phyCORE module and apply the appropriate DDR timing parameters at runtime. Alternatively, a fixed memory configuration can still be enforced via a dedicated Kconfig option if dynamic detection is not desired. Note that while U-Boot correctly discovers the full physical memory bank, the device tree excludes the memory beyond 3 GB (below the 4 GB boundary). This ensures that U-Boot allocations and early EFI staging buffers remain safe from 32-bit interconnect DMA limitations inherent to some i.MX8MM IP blocks. Signed-off-by: INgo Rah Reviewed-by: Gregor Herburger Reviewed-by: Benedikt Spranger Reviewed-by: Yannic Moog Tested-by: Yannic Moog

board: phycore_imx8mm: update RAM timings

2026-08-03T12:31:05Z

Updated RAM timings with new generated settings using DDR Tool v3.6.0_22-aa018543. Provide functions for 1GB, 4GB and revision 7 variants. Signed-off-by: INgo Rah Reviewed-by: Gregor Herburger Reviewed-by: Benedikt Spranger Tested-by: Yannic Moog