<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/board, branch v2012.07-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board?h=v2012.07-rc1</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/board?h=v2012.07-rc1'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2012-07-10T07:18:33Z</updated>
<entry>
<title>Minor Coding Style cleanup</title>
<updated>2012-07-10T07:18:33Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2012-07-10T07:18:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3fe63839f3f0f9942fc4567a82954192e144e6a1'/>
<id>urn:sha1:3fe63839f3f0f9942fc4567a82954192e144e6a1</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
</content>
</entry>
<entry>
<title>tegra: trimslice: set up serial flash pinmux</title>
<updated>2012-07-09T20:44:33Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-06-12T08:33:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2db7b952844f95c8299bb84bc3b2d38e8f48f5cd'/>
<id>urn:sha1:2db7b952844f95c8299bb84bc3b2d38e8f48f5cd</id>
<content type='text'>
When Trimslice is booted from serial flash, the boot ROM does this, so
U-Boot doesn't need to. However, booting from the SD slot for recovery
purposes, the boot ROM does not set up the pinmux for serial flash. Add
code to U-Boot to set this up, so that an SD-based recovery U-Boot image
can upgrade the U-Boot in serial flash.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: add pin_mux_spi() board initialization function</title>
<updated>2012-07-09T20:44:33Z</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2012-06-12T08:33:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e02849488724bdfdc36ef8105c59a49986db3ebc'/>
<id>urn:sha1:e02849488724bdfdc36ef8105c59a49986db3ebc</id>
<content type='text'>
Boards can override this to set up the pinmux correctly to access serial
flash.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: fix leftover CONFIG_TEGRA2_MMC &amp; _SPI build switches</title>
<updated>2012-07-09T20:44:32Z</updated>
<author>
<name>Tom Warren</name>
<email>twarren.nvidia@gmail.com</email>
</author>
<published>2012-06-01T08:22:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1e2d7859758499a25fa392deb5cfda95372d97ae'/>
<id>urn:sha1:1e2d7859758499a25fa392deb5cfda95372d97ae</id>
<content type='text'>
Missed some boards after my tegra2_mmc.* -&gt; tegra_mmc.* change, and
one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.

Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
</content>
</entry>
<entry>
<title>tegra: Add Tamonten Evaluation Carrier support</title>
<updated>2012-07-09T20:44:32Z</updated>
<author>
<name>Thierry Reding</name>
<email>thierry.reding@avionic-design.de</email>
</author>
<published>2012-06-04T20:02:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d70575b6d0d53492c0920b9a3d4479964909dc9b'/>
<id>urn:sha1:d70575b6d0d53492c0920b9a3d4479964909dc9b</id>
<content type='text'>
The Tamonten Evaluation Carrier is an evaluation board for the Tamonten
processor board. More information is available here:

	http://www.avionic-design.de/en/products/nvidia-tegra-tamonten-system-en/nvidia-tegra-tamonten-evboard-en.html

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: Use SD write-protect GPIO on Tamonten</title>
<updated>2012-07-09T20:44:32Z</updated>
<author>
<name>Thierry Reding</name>
<email>thierry.reding@avionic-design.de</email>
</author>
<published>2012-06-04T20:02:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=792545430535c7fec7ecfcdf988dd3e9d46c0dd1'/>
<id>urn:sha1:792545430535c7fec7ecfcdf988dd3e9d46c0dd1</id>
<content type='text'>
GPIO PI6 can be used to obtain the write-protect status of an SD card
inserted into the SD slot.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: Implement gpio_early_init() on Tamonten</title>
<updated>2012-07-09T20:44:32Z</updated>
<author>
<name>Thierry Reding</name>
<email>thierry.reding@avionic-design.de</email>
</author>
<published>2012-06-04T20:02:28Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=22d58506f5d04918d2bde62c5fe71abee24e4ea8'/>
<id>urn:sha1:22d58506f5d04918d2bde62c5fe71abee24e4ea8</id>
<content type='text'>
The PI4 GPIO is used on Tamonten to reset carrier board peripherals.
Power sequencing hardware on the carrier pulls the reset low before
powering up the Tegra, and the CPU is supposed to signal readiness,
and therefore bring peripherals out of reset by pulling PI4 high.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: Allow boards to perform early GPIO setup</title>
<updated>2012-07-09T20:44:32Z</updated>
<author>
<name>Thierry Reding</name>
<email>thierry.reding@avionic-design.de</email>
</author>
<published>2012-06-04T20:02:27Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cb7a1cf36a59772670adcd2c90cee40c2ed1bc60'/>
<id>urn:sha1:cb7a1cf36a59772670adcd2c90cee40c2ed1bc60</id>
<content type='text'>
The new gpio_early_init() function, which does nothing by default, can
be overridden by boards to configure GPIOs at an early stage.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: plutux: Add device tree support</title>
<updated>2012-07-09T20:44:32Z</updated>
<author>
<name>Thierry Reding</name>
<email>thierry.reding@avionic-design.de</email>
</author>
<published>2012-06-04T20:02:26Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a7dafd7b1a980d0518473b02574307b153ccddb5'/>
<id>urn:sha1:a7dafd7b1a980d0518473b02574307b153ccddb5</id>
<content type='text'>
Device tree support is required for working USB host support, which in
turn enables ethernet support.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>tegra: medcom: Add device tree support</title>
<updated>2012-07-09T20:44:32Z</updated>
<author>
<name>Thierry Reding</name>
<email>thierry.reding@avionic-design.de</email>
</author>
<published>2012-06-04T20:02:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1cbdf2d7e1fc40ef0dcacf7ef03bbdc9b0a6382e'/>
<id>urn:sha1:1cbdf2d7e1fc40ef0dcacf7ef03bbdc9b0a6382e</id>
<content type='text'>
Device tree support is required for working USB host support, which in
turn enables ethernet support.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
</entry>
</feed>
